Re: [avr-chat] Mutiple Interrupts on ATmega

[Vincent Trouilliez]

> Some other CPUs allow to define a priority, AVR not, but there must be any
> kind of HW strategy build into the AVR to handle this.
> 
> Any comments are welcome.

Yes, the priority is hard coded so to speak, and is governed by the
vector table, as explained in the datasheet. The higher the vector
number, the lower the priority. 
So, omitting the reset vector of course, 'INT0', the external interrupt
#0, has the highest priority, then INT1, then INT2...


--
Vince