[avr-chat] UART TXC

[Flemming Gram Christensen]

Hi list.

 

What is the reason that the TXC bit is not cleared when you write a byte into UDR?

I am using a mega169, but the other devices do probably behave similar.

 

The TXC bit is set when the last bit in the UART shift register is transmitted and UDR does not contain a byte to transmit. The bit is cleared then the transmit complete interrupts is executed and can be cleared manually in software.

Why is it not cleared also when starting transmission of a new byte?

 

The datasheet does not mention this but states in the section on baud-rates that if you want to change baudrate you should manually clear the txc before writing to udr.

 

We had a bug on this which made me curious about the reasons for this design choice.

 

Best regards