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Re: [avr-gcc-list] AT90s1200-12 latched short circuit


From: Richard Urwin
Subject: Re: [avr-gcc-list] AT90s1200-12 latched short circuit
Date: Tue, 3 Feb 2004 22:43:01 +0000
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On Monday 02 Feb 2004 11:33 pm, you wrote:
> It is not clear to me if this "hot" state occurred once, or if it is
> reproducable...

I only noticed it once...

> Without a schematic for the circuit (indicating at least what you
> *think* you built! :-) one has to assume that your circuit is OK. 

The circuit is really simple:
a handful of decoupling capacitors: 10nF ceramic.
the (AVR042) standard power-on reset circuitry. (a resistor and diode to 
Vcc, a capacitor to ground)
four switches from PD3-6 to ground, diode OR'd to INT0. (No external 
pull-ups, internal pull-ups enabled.)
one pizzo between PD0 and ground.
a 12MHz crystal and loading capacitors.
two diodes (1N4001) in series with the power feed, one on Vcc, the other 
on ground.
4 AA batteries.

> Assuming that it is, there are at least a couple of possibilities:
>
> (1) You managed to get the chip to "latch up".  The AT90S1200 is a
> pure CMOS design and therefore static discharge, or any other sort of
> unexpected pulse on an I/O (or power/ground) pin can induce
> "latch-up". This means that literally every single transistor on the
> microcontroller's die has gone into an "on" state.  Therefore every
> single CMOS transistor on the die is conducting power from Vcc (i.e.,
> +6V) to ground.  The only way to clear the "latch up" is to remove
> power.  Usually, the chip never recovers from this, unless you detect
> it early.  If "latch-up" was to blame, I'd assume that your "trying
> it again" caused this event because the chip did survive, and thus
> this was an isolated event.

I think this must have been caused when I first tried to measure the 
voltage of the batteries. Maybe I momentarily shorted it out or 
something. If this had been going on for several days  (a) the 
batteries would have died, and (b) the chip would have died. Added to 
which it was inside a closed plastic box with no external conductive 
contacts and no power switch.

> (2) You have one of the I/O pins "fighting" an immovable electrical
> force, such as trying to drive a grounded I/O pin high.

I am almost certain that this is impossible with the circuit. The only 
thing that might cause it is a program error trying to drive a button 
input high when the button is pressed. I'll have another look, but I 
don't think that's going to happen. On the other hand it seems there 
must be a bug somewhere to have caused the original failure.

> (In fact, I 
> have seen this induce "latch-up" in AVR parts in the past.)  Normally
> though, the chip resets and re-runs the program over again and then
> does exactly the same thing.  This can consume a *lot* of power and
> heat up the chip. Also, your program will look like it's "not
> working".

Thanks for that. I'll keep it in mind.

>
> > The only routes to either power line with no button pressed is via
> > the pizzo transducer, or the reset pin (standard power-on reset
> > circuit.) There is no limiting resistor on the pizzo, but even with
> > the chip driving it hard I wouldn't expect it to develop much more
> > than 20mA.
>
> Why?

Because an output pin is only supposed to be able to drive that much 
current.

>
> > That would not make the 1N4001s hot enough to burn my finger.
>
> Ah...this is significant.  Follow the current!  Show us the circuit
> and tell us what you think you are doing with the I/O lines connected
> to these diodes!  Are they programmed as inputs.  How are you
> "pulling up" PD3-6? How is the INT0 pin onfigured?  Show us the code!

The 1N4001s are in series with the power supply, to drop a few fractions 
of a volt for safety. They would heat up with any significant 
short-circuit anywhere on the board.

> > Has anyone seen this behaviour? Might 0.15V above maximum voltage
> > cause this to happen?
>
> Unlikely.

Thanks, that's what I thought.

Thanks for your input. I'm reasonably convinced that I have a possible 
programming bug and the latch-up was caused during the testing process.

-- 
Richard Urwin


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