RE: [avr-gcc-list] Make file to recursivly generate code for morethan one target ?

[Dave Hylands]

Actually, that's not true (that all recipies cause a shell to be
invoked).

It's certainly true from a conceptual point of view, but as an
optimization, make looks at the command to be executed. If redirection,
piping, multiple commands, (&& || ;) or subshells (parenthesis) are
detected, then a shell is invoked. Otherwise make executes the command
directly without having to invoke a shell. This dramatically improves
the overall performance.

To prove this, all you need to do is write a program which pauses and
waits for a keypress. In another window, use a tool like Process
Explorer from the http://www.sysinternals.com/ website and you can see
exactly which processes make launched (look at the process waiting for
the keystroke, and find the parent process id. The parent process id
should correspond to make. Then try the same thing using redirection.

You can certainly use make to call sub-makes:

Some-target:
        $(MAKE) var1=val1 var2=val2 some-other-target
        $(MAKE) var1=val3 var2=val4 yet-another-taregt

If you want to call make in a different directory (because you have a
tree of makefiles), then you typically invoke make with the -C flag to
have it change directories.

It's also possible to setup the makefile to be able to generate multiple
targets. It's all in how things are structured. When you boil make down
it's basically just a dependency tree builder that does stuff to bring
the dependency tree up to date (by executing commands).

I've setup some makefile systems for rather large build environments
(compiling hundreds of source files), and I'd be happy to answer any
questions.

Make can be quite powerful, especially once you figure out what those
terse error messages really mean. It's also very educational to use the
-p and -d flags to debug your makefiles. It takes a while to figure out
exactly how to interpret the output, but the answer to weird makefile
behaviour is almost always buried in there :)

--
Dave Hylands
Vancouver, BC, Canada
http://www.DaveHylands.com/ 


-----Original Message-----
From: address@hidden
[mailto:address@hidden On Behalf Of Sander Pool
Sent: Thursday, June 03, 2004 5:40 PM
To: E. Weddington; address@hidden
Subject: Re: [avr-gcc-list] Make file to recursivly generate code for
morethan one target ?



AGAIN recipes is make are executed by a shell. Unless gnu make is
different and I doubt that as earlier WinAVR releases had make trouble
because of paths to the shell. Even the most trivial recipe like
'$(MAKE) -bla' is executed by a shell.

    Sander

----- Original Message ----- 
From: "E. Weddington" <address@hidden>
To: <address@hidden>; "Sander Pool" <address@hidden>
Cc: <address@hidden>
Sent: Thursday, June 03, 2004 3:53 PM
Subject: Re: [avr-gcc-list] Make file to recursivly generate code for
morethan one target ?


> On 3 Jun 2004 at 14:51, Sander Pool wrote:
>
> >
> > Since the recipes for make are executed by whatever shell is 
> > configured
you can
> > simply stick that shell script in the rule and pretend make is doing

> > the
looping
> > when in fact it's really the shell.
> >
> > So:
> >
> >
> > do_all:
> >     script line 1\
> >     script line 2\
> >     etc.
> >
> > Make would call itself with the same makefile.
> >
> >     Sander
> >
>
> Again, it is completely unnecessary to have the shell call make. Make 
> has
the
> ability to recursively call itself:
>
> <http://www.gnu.org/software/make/manual/html_mono/make.html#SEC58>
>
> Eric
>
> [Again, this probably won't make it to the list. I'm looking into it; 
> it's probably on my end. Bear with me.]
>
>
>


_______________________________________________
avr-gcc-list mailing list
address@hidden http://www.avr1.org/mailman/listinfo/avr-gcc-list