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Re: [avr-gcc-list] Improved loop patch


From: Marek Michalkiewicz
Subject: Re: [avr-gcc-list] Improved loop patch
Date: Tue, 1 Mar 2005 09:25:07 +0100
User-agent: Mutt/1.5.6+20040907i

Hi,

On Mon, Feb 28, 2005 at 06:39:17PM -0500, address@hidden wrote:

> The loop change allows the SBRx instrcution to be use to skip over 1,2 or 3 
> word instructions -previously it would only skip 1 word instructions.  So you 
> will less SBRx Rx,n; RJMP nnnn combinations.

Thanks for your work - I've just looked at it a little.  A few comments:

1. Correct me if I am wrong, but what are these 3-word AVR instructions? :)
2. Yes, 2-word instructions actually exist (CALL, JMP, LDS, STS), but you
   have to be careful with them - some old (non-enhanced core) AVR devices
   have an errata where skipping a 2-word opcode may not work correctly
   (avr-as gives a warning when it detects such code).
3. Instead of checking for specific RTL patterns in avr.c (might be error
   prone), I'd suggest to define a new insn attribute (say, "skip_ok"),
   and add it to the few insns in avr.md which may be skipped.  Then, the
   insn may be skipped if length == 1, or if the attribute is true and
   the device is not affected by the errata mentioned above.
4. Please submit each logical change in a separate patch, with its own
   ChangeLog entry.  While PR18251 is a regression and certainly should
   be fixed, non-trivial improvements (which are not bug fixes) will
   probably have to wait until after 4.0 is released.
5. Have you done the FSF paperwork (copyright assignment or disclaimer)?
   MODES_TIEABLE_P was a small change, big improvement but not significant
   for copyrights.  Non-trivial changes like movmem* may be problematic
   without the paperwork.  The FSF is very paranoid about these issues
   (and the recent SCO problems show they may be right after all...).

Thanks,
Marek





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