Re: [avr-gcc-list] [OT] Need For Speed (FPGA)

[David Brown]

> Marvin Dickens wrote:
> > On Friday 27 May 2005 07:22 pm, Martin Bammer wrote:
> >
>
> Having learnt and used vhdl on xilinx spartanII in depth using webpack,
and used
> vhdl on altera acex, i found vhdl an overly verbose, inflexible, poorly
designed
> and cumbersome language. It is a pascal/ada like language. They say
verilog
> is a C-like language. I'd rather learn that next time than touch vhdl with
> a barge pole. Also useful to read news:comp.arch.fpga
>

"They" say that verilog is C-like, while VHDL is like pascal/ada (two
languages which can only be called "similar" if you never used anything but
C and assembly).  It is repeated so often that even people who have used all
the languages mentioned believe it and pass it on as standard information.
It is, of course, complete drivel except perhaps in that VHDL is more
verbose, more expressive, more flexible, stronger-typed, more advanced, and
more needlessly repetative than Verilog.

FPGA programming is a totally different concept from sequential programming,
and unless you understand that from day one, you'll get in a mess.  You have
to think from the viewpoint of the hardware - comparisons to "C" or "Ada"
are purely in terms of the sort of syntax used (and I think that is almost
entirely due to Verilog's use of brackets for blocks, while VHDL uses begin
and end).  It's a different world from microcontroller programming.  It's an
exciting and challanging world, with huge flexibility and potential, but
it's not just a simple step.  If your AVR design is not fast enough,
consider moving up within the processor world (ARM, ColdFire, or something),
unless you are sure that your problem is very much suited to FPGAs (or
CPLDs).

If you decide to go for FPGA design, you might want to consider Atmel's
FPSLICs with an AVR and FPGA in the same chip.  Otherwise, go for Altera
rather than Xilinx - their chips are nicer (IMHO), the devices are available
when Altera says they will be, and the design software is far better.  Also
think whether you need an FPGA or a CPLD - you get a lot into a Max II CPLD,
and the board integration is much easier.  There are some cheap boards
available for development.

As for the design language, there are a number of choices.  There are a few
old die-hards who use schematics - avoid that like the plague.  They are
good for connecting together blocks in a nice overview, but not for the guts
of the design.  There are also several very low-level languages like ABEL -
view them as the assembly language of FPGA design.  The majority of
designers use Verilog or VHDL - it does not really matter which you choose,
you will find both languages annoying (although in slightly different ways).
Neither language was designed for synthesis, but for modelling.  Verilog is
popular in the USA, while VHDL is popular in Europe - choose according to
the resources and help you have arround you.  Finally, there is the choice
of the adventurous - there are a number of other lesser-used languages
available for fpga design.  I use confluence (www.confluent.org), which is
neat, compact, flexible, generates VHDL or Verilog (or both), easy to
simulate, and open-source.

David