Re: [avr-gcc-list] Problem with stack

[Haase Bjoern (PT-BEU/EMT)]

Hi,
 
For AVR there is an undocumented feature that is present to my best knowledge 
on all of the AVR devices 
that when enabling IRQs the first IRQ could happen only two instructions after 
the "enabling" instruction.
This feature seems to be related to the two-stage pipeline used for the 
implementation.

In your example this means: The IRQ could happen only before line 37, so there 
is no problem.

Bjoern.


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Von: address@hidden [mailto:address@hidden Im Auftrag von v a
Gesendet: Dienstag, 13. Juni 2006 15:56
An: address@hidden
Betreff: [avr-gcc-list] Problem with stack

This is list file of function attached on mail.
The problem is on Line 34. Interrupts are restored before complete
modyfy on Stack registers and if interrupt occurred CPU is going to
hell.
Can anybody help me

Vasil Atanasov



   1                            .file   "sprintf1.c"
   2                            .arch atmega128
   3                    __SREG__ = 0x3f
   4                    __SP_H__ = 0x3e
   5                    __SP_L__ = 0x3d
   6                    __tmp_reg__ = 0
   7                    __zero_reg__ = 1
   8                            .global __do_copy_data
   9                            .global __do_clear_bss
  17                    .Ltext0:
  18                    .global sprintf1
  20                    sprintf1:
  21                    .LFB3:
  22                    .LM1:
  23                    /* prologue: frame size=14 */
  24 0000 0F93                  push r16
  25 0002 1F93                  push r17
  26 0004 CF93                  push r28
  27 0006 DF93                  push r29
  28 0008 CDB7                  in r28,__SP_L__
  29 000a DEB7                  in r29,__SP_H__
  30 000c 2E97                  sbiw r28,14
  31 000e 0FB6                  in __tmp_reg__,__SREG__
  32 0010 F894                  cli
  33 0012 DEBF                  out __SP_H__,r29
  34 0014 0FBE                  out __SREG__,__tmp_reg__
  35 0016 CDBF                  out __SP_L__,r28
  36                    /* prologue end (size=12) */
  37 0018 0D89                  ldd r16,Y+21
  38 001a 1E89                  ldd r17,Y+22