avr-gcc-list
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[avr-gcc-list] ATmega8515 Interrupt Timing


From: User Tomdean
Subject: [avr-gcc-list] ATmega8515 Interrupt Timing
Date: Fri, 28 Jul 2006 15:52:10 -0700 (PDT)

Sorry, this is long.

I am trying to match interrupt timimg to ATmega8515 cycles.  I am
trying to understand the timing and sources of jitter.  I have an
ATmega8515L with an external 8.000Mhz clock.

My test application has a loop of 4.751usec, or 38 instruction cycles.
The main loop has 4 instructions for 8 cycles.  The Isr has the
interrupt latency, *** unknown 1 cycle ***, a preamble of 8 cycles, 3
instructions for 6 cycles, a post-amble of 7 cycles and an rti of 4
cycles.

By looking at the disassembly of the .elf and an oscilloscope attached
to ports A and E, I matched time to the end of each specific
instruction.  However, I am missing 1 cycle, marked 11 in the table
below.  What is the cycle I am missing?  The '8515 data sheet says the
interrupt takes 4 clocks and the rjmp from the vector takes 3 clocks.
I see a max of 5 clocks for this.  Is the interrupt 2 cycles for a
push and 3 cycles for the rjmp?

The source:

void interrupt2_init() {
  GIFR &= ~_BV(INT2);              /* make sure no interrupt pending */
  GICR &= ~_BV(INT2);              /* make sure don't get interrupt */
  EMCUCR |= _BV(ISC2);             /* interrupt 2 rising edge */
  GICR |= _BV(INT2);               /* enable interrupt 2 if have sei */
  return;
}
ISR(SIG_INTERRUPT2) {
  PORTE &= ~_BV(PE0);
  PORTA |=  _BV(PA0);
  PORTA &= ~_BV(PA0);
  return;
}
int main() {
  interrupt2_init();
  DDRE = 0xff;  /* all output - software interrupt */
  DDRA = 0xff;  /* all output */
  sei();
  while (1) {
        PORTA |= _BV(PA1);
        PORTE |= _BV(PE0);
        PORTA &=~_BV(PA1);
  }
  return 0;
}

Here is what I see on the scope, a Tek TDS 2014.  I calculated the
number of cycles to match the waveforms.  The time and cycle number
are at the end of the event/instruction.

Calc                   End of
Cycle Time(usec) Func  Instruction   Scope Trace
----- ---------  ----  -----------   -----------------------
  0   0          Main  sbi for PA1   Port A pin 1 goes high
  2   0.250      Main  sbi for PE0   Port E pin 0 goes high
  4   0.500      Main  cbi for PA1   Port A pin 1 goes low
  6              Main  rjmp
 10                    interrupt
 11                    What is this?
 19                    isr preamble
 21   2.620      Isr   cbi for PE0   Port E pin 0 goes high
 23   2.880      Isr   sbi for PA0   Port A pin 0 goes high
 25   3.120      Isr   cbi for PA1   Port A pin 0 goes low
 32                    isr cleanup
 34              Isr   reti
 38   4.751      Main  sbi for PA1   Port A pin 1 goes high

Now, the assembly dump.
00000058 <main>:
  58:   cf e5           ldi     r28, 0x5F       ; 95
  5a:   d2 e0           ldi     r29, 0x02       ; 2
  5c:   de bf           out     0x3e, r29       ; 62
  5e:   cd bf           out     0x3d, r28       ; 61
  60:   14 d0           rcall   .+40            ; 0x8a <interrupt2_init>
  62:   8f ef           ldi     r24, 0xFF       ; 255
  64:   8a bb           out     0x1a, r24       ; 26
  66:   78 94           sei
  68:   d9 9a           sbi     0x1b, 1 ; 27
  6a:   38 9a           sbi     0x07, 0 ; 7
  6c:   d9 98           cbi     0x1b, 1 ; 27
  6e:   fc cf           rjmp    .-8             ; 0x68 <main+0x10>
00000070 <__vector_13>:
  70:   1f 92           push    r1
  72:   0f 92           push    r0
  74:   0f b6           in      r0, 0x3f        ; 63
  76:   0f 92           push    r0
  78:   11 24           eor     r1, r1
  7a:   38 98           cbi     0x07, 0 ; 7
  7c:   d8 9a           sbi     0x1b, 0 ; 27
  7e:   d8 98           cbi     0x1b, 0 ; 27
  80:   0f 90           pop     r0
  82:   0f be           out     0x3f, r0        ; 63
  84:   0f 90           pop     r0
  86:   1f 90           pop     r1
  88:   18 95           reti

tomdean




reply via email to

[Prev in Thread] Current Thread [Next in Thread]