Re: [avr-gcc-list] Add builtins in avr target.

[Oleksandr Redchuk]

2008/4/17, Wouter van Gulik <address@hidden>:

>  For a 2 cycles delays an rjmp can be used. Saves an instruction!

And so on:

3 cycles:
   rjmp .
   nop

4 cycles:
  rjmp .
  rjmp .

5 cycles:
  rjmp .
  rjmp .
  nop

6 cycles:
  rjmp .
  rjmp .
  rjmp .

All code portions use no more program words than delay loop and not
use any register.

7 cycles delay requires four instructions and delay loop is more
efficient in code size:

>> If  'delay' is from 3 to 756 then code:

7 to 756

>>   ldi rX, (delay/3)
>>  1:dec rX
>>    brne 1b
>> is generated. 'ldi' instruction can be removed by optimizer.

and removed ldi instruction execution time (1 cycle) for 7+ cycles
will produce less relative error than for 3..6 cycles delay

-- 
wbr,
ReAl