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[avr-gcc-list] [avr-libc]: Smarter parity implementation
From: |
Georg-Johann Lay |
Subject: |
[avr-gcc-list] [avr-libc]: Smarter parity implementation |
Date: |
Sat, 30 Jul 2011 12:35:44 +0200 |
User-agent: |
Mozilla Thunderbird 1.0.7 (Windows/20050923) |
The current implementation of parity in avr-libc compiles
#include <stdint.h>
#include <util/parity.h>
uint8_t pari1 (uint8_t val)
{
return parity_even_bit (val);
}
with -Os to
pari1:
/* #APP */
mov __tmp_reg__,r24
swap r24
eor r24,__tmp_reg__
mov __tmp_reg__,r24
lsr r24
lsr r24
eor r24,__tmp_reg__
/* #NOAPP */
ldi r25,lo8(0)
adiw r24,1
asr r25
ror r24
andi r24,lo8(1)
ret
which are 12 instructions, 13 ticks and 2 regs.
Parity can be implemented with 9 instructions
and 9 ticks and one reg. Instead of r24 any d-reg
can be used:
;; r24 = parity8 (r24)
;; clobbers: __tmp_reg__
parity8:
;; parity is in r24[0..7]
mov __tmp_reg__, r24
swap __tmp_reg__
eor r24, __tmp_reg__
;; parity is in r24[0..3]
subi r24, -4
andi r24, -5
subi r24, -6
;; parity is in r24[0,3]
sbrc r24, 3
inc r24
;; parity is in r24[0]
andi r24, 1
An implementation similar to the original avr-libc
using one instruction/tick more is
mov __tmp_reg__,r24
swap r24
eor r24,__tmp_reg__
mov __tmp_reg__,r24
lsr r24
lsr r24
eor r24,__tmp_reg__
lsr r24
sbci r24,0
andi r24,1
Regards.
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