Re: [avr-gcc-list] Linker script patch with __flashN size checking. [Was: Handling __flash1 and .trampolines]

[Niklas Holsti]

On 12-12-15 13:48 , Erik Christiansen wrote:
> Many thanks, Johann, for the clarification that your explanation has
> provided.
> 
> On 14.12.12 23:00, Georg-Johann Lay wrote:
>> The 64-bit ranges come from the ELPM instruction that takes the
>> 16-bits of Z-reg and concatenates RAMPZ as bits 16..23 to get a
>> 24-bit address.
> 
> The common computer terms "paged" and "page aligned" seem to fit
> perfectly here. AIUI, the Z-reg is a page register, providing base 2^16
> page addresses, and RAMPZ provides an address within the page.

It is the other way around. RAMPZ provides the higher (more significant)
bits of the address (= the "page number") and Z provides the less
significant bits ( = the offset from the start of the "page"). But
otherwise, yes, paged addressing is similar.

However, at least in some of the AVR instructions that auto-increment or
auto-decrement the address, the carry/borrow extends from the 16-bit
less-significant address register (Z, here) to the 8-bit, more
significant register (RAMPZ, here), so the whole 24-bit address is
auto-incremented/decremented. This is not common in plain paged
addressing with auto-inc/dec, where the register that holds the offset
in the page typically just wraps around, without affecting the
page-number register, which stays put.

--
Niklas Holsti
Tidorum Ltd