[avr-libc-dev] AT90CAN128 - Flaming On

[Bruce Graham]

All,

I hope nobody imagines that I am picking on them.  This is a truly
marvelous thing you have here.

We strive to continuously improve the product, and to that end.

The header file iocan128.h has the following additional problems:

Currently bits 3, 2, 1, 0 in register XMCRA seem to have an extra letter
'L' in their names.  According to    4250C-CAN-03/04 those lines should
be corrected read:

    #define    SRW11    3
    #define    SRW10    2
    #define    SRW01    1
    #define    SRW00    0

In the bit definitions for the Timer/Counter 2 Control register, the
name in the comment is TCCR2.  It should be TCCR2A.
Bit 7 in the Timer/Counter 2 Control Register should be FOC2A
Bit 5 in the Timer/Counter 2 Control Register should be COM2A1
Bit 4 in the Timer/Counter 2 Control Register should be COM2A0

The ordering of the register bit definitions follows no plan or outline
I can determine, and the definitions for the PINA are located with the
definition of the register(!?).  The register bit definitions should
probably be rearranged in some sensible order, by register address, or
alphabetic, or by functional group.

Has anyone noticed that the datasheet has a wowser on page 57-58
indicating that the interrupt vectors are two bytes long when in fact
they are four bytes long.  Just wondering.

Continuing to check
Bruce