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[Bug binutils/19921] enable specification of data width when writing ver


From: nickc at redhat dot com
Subject: [Bug binutils/19921] enable specification of data width when writing verilog hex format
Date: Mon, 11 Apr 2016 16:23:05 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=19921

--- Comment #7 from Nick Clifton <nickc at redhat dot com> ---
Hi Jamey,

> revised patch

Thanks for this - but you need to update the tests to cope with both types of
endian target.

Cheers
  Nick

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