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[Bug gas/23126] SVC instruction is rejected for ARM Cortex-M0
From: |
freddie_chopin at op dot pl |
Subject: |
[Bug gas/23126] SVC instruction is rejected for ARM Cortex-M0 |
Date: |
Tue, 01 May 2018 18:33:53 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=23126
--- Comment #3 from Freddie Chopin <freddie_chopin at op dot pl> ---
Hmmm... It seems that the problem is not entirely in GAS, but in GCC 8 (RC) as
well...
With GCC 7.3.0 and most recent binutils everything works fine. With GCC 8.0.1
20180427:
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
$ cat svc.cpp
__attribute__ ((naked))
int supervisorCall(int (& function)(int, int, int, int), const int argument1,
const int argument2, const int argument3,
const int argument4)
{
asm volatile
(
" mov r12, r0 \n"
" ldr r0, [sp] \n"
" svc 0 \n"
" \n"
" bx lr \n"
);
__builtin_unreachable();
// suppress warnings
(void)function;
(void)argument1;
(void)argument2;
(void)argument3;
(void)argument4;
}
$ arm-none-eabi-g++ -c svc.cpp -mcpu=cortex-m0 -save-temps
svc.s: Assembler messages:
svc.s:31: Error: SVC is not permitted on this architecture
$ diff -u svc-7.s svc.s
--- svc-7.s 2018-05-01 20:14:09.031910734 +0200
+++ svc.s 2018-05-01 20:16:36.751143427 +0200
@@ -12,6 +12,7 @@
.text
.align 1
.global _Z14supervisorCallRFiiiiiEiiii
+ .arch armv6-m
.syntax unified
.code 16
.thumb_func
@@ -37,4 +38,4 @@
.cantunwind
.fnend
.size _Z14supervisorCallRFiiiiiEiiii,
.-_Z14supervisorCallRFiiiiiEiiii
- .ident "GCC: (bleeding-edge-toolchain) 7.3.0"
+ .ident "GCC: (bleeding-edge-toolchain) 8.0.1 20180427 (prerelease)"
$ cat svc.s
.cpu cortex-m0
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 1
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "svc.cpp"
.text
.align 1
.global _Z14supervisorCallRFiiiiiEiiii
.arch armv6-m
.syntax unified
.code 16
.thumb_func
.fpu softvfp
.type _Z14supervisorCallRFiiiiiEiiii, %function
_Z14supervisorCallRFiiiiiEiiii:
.fnstart
.LFB0:
@ Naked Function: prologue and epilogue provided by programmer.
@ args = 4, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
.syntax divided
@ 12 "svc.cpp" 1
mov r12, r0
ldr r0, [sp]
svc 0
bx lr
@ 0 "" 2
.thumb
.syntax unified
.cantunwind
.fnend
.size _Z14supervisorCallRFiiiiiEiiii,
.-_Z14supervisorCallRFiiiiiEiiii
.ident "GCC: (bleeding-edge-toolchain) 8.0.1 20180427 (prerelease)"
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
(svc-7.s is a temp file generated with GCC 7.3.0)
So new GCC adds explicit arch info - `.arch armv6-m`. The most simple test
case:
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
$ echo 'svc 0' > /tmp/just-svc.s
$ arm-none-eabi-as -mcpu=cortex-m0 just-svc.s
$ arm-none-eabi-as -mcpu=cortex-m0 -march=armv6-m just-svc.s
$ arm-none-eabi-as -march=armv6-m just-svc.s
just-svc.s: Assembler messages:
just-svc.s:1: Error: SVC is not permitted on this architecture
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
So it seems that if you have both `-mcpu=cortex-m0 -march=armv6-m` then GAS has
no problem with that. However if both CPU and ARCH are specified with
directives in the file, then GAS doesn't like this:
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
$ cat svc-directives.s
.cpu cortex-m0
.arch armv6-m
.syntax unified
.thumb
svc 0
$ arm-none-eabi-as svc-directives.s
svc-directives.s: Assembler messages:
svc-directives.s:5: Error: SVC is not permitted on this architecture
-- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 -- >8 --
I still think all these GAS errors are wrong, as "ARMv6-M Architecture
Reference Manual" says SVC is permitted even if not implemented in the core.
Do you think I should file a bug report for GCC too?
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