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[Commit-gnuradio] r3529 - usrp-hw/trunk/sym/generated
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From: |
matt |
|
Subject: |
[Commit-gnuradio] r3529 - usrp-hw/trunk/sym/generated |
|
Date: |
Tue, 12 Sep 2006 23:26:20 -0600 (MDT) |
Author: matt
Date: 2006-09-12 23:26:20 -0600 (Tue, 12 Sep 2006)
New Revision: 3529
Added:
usrp-hw/trunk/sym/generated/dp83865-CFGLED.src
usrp-hw/trunk/sym/generated/dp83865-CLK.src
usrp-hw/trunk/sym/generated/dp83865-JTAG.src
usrp-hw/trunk/sym/generated/dp83865-MAC.src
usrp-hw/trunk/sym/generated/dp83865-MDI.src
usrp-hw/trunk/sym/generated/dp83865-MGT.src
usrp-hw/trunk/sym/generated/dp83865-PWR.src
Modified:
usrp-hw/trunk/sym/generated/Makefile
Log:
ethernet phy
Modified: usrp-hw/trunk/sym/generated/Makefile
===================================================================
--- usrp-hw/trunk/sym/generated/Makefile 2006-09-13 01:40:21 UTC (rev
3528)
+++ usrp-hw/trunk/sym/generated/Makefile 2006-09-13 05:26:20 UTC (rev
3529)
@@ -124,7 +124,14 @@
xc3sXX00fg456-CLK.sym \
xc3sXX00fg456-PWR.sym \
xc3sXX00fg456-JTAG.sym \
- xc3sXX00fg456-VREF.sym
+ xc3sXX00fg456-VREF.sym \
+ dp83865-CFGLED.sym \
+ dp83865-CLK.sym \
+ dp83865-JTAG.sym \
+ dp83865-MAC.sym \
+ dp83865-MDI.sym \
+ dp83865-MGT.sym \
+ dp83865-PWR.sym
all : $(SOURCES)
@@ -134,4 +141,4 @@
%.sym : %.src
$(TRAGESYM) $< $@
-
+
Added: usrp-hw/trunk/sym/generated/dp83865-CFGLED.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-CFGLED.src
(rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-CFGLED.src 2006-09-13 05:26:20 UTC
(rev 3529)
@@ -0,0 +1,67 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=5200
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-CFGLED
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 7 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+1 in line l NON\_IEEE\_STRAP
+6 in line l MAN\_MDIX\_STRAP/TX\_TCLK
+7 io line r ACTIVITY\_LED/SPEED0\_STRAP
+8 io line r LINK10\_LED/RLED/SPEED1\_STRAP
+9 io line r LINK100\_LED/DUPLEX\_STRAP
+10 io line r LINK1000\_LED/AN\_EN\_STRAP
+13 io line r DUPLEX\_LED/PHYADDR0\_STRAP
+14 in line l PHYADDR1\_STRAP
+17 in line l PHYADDR2\_STRAP
+18 in line l PHYADDR3\_STRAP
+95 in line l PHYADDR4\_STRAP
+94 io line l MULTI\_EN\_STRAP/TX\_TRIGGER
+89 io line l MDIX\_EN\_STRAP
+88 in line l MAC\_CLK\_EN\_STRAP/TX\_SYN\_CLK
+34 in line l VDD\_SEL\_STRAP
+
Added: usrp-hw/trunk/sym/generated/dp83865-CLK.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-CLK.src (rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-CLK.src 2006-09-13 05:26:20 UTC (rev
3529)
@@ -0,0 +1,55 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-CLK
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 6 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+86 clk clk l CLK\_IN
+87 out line l CLK\_OUT
+85 out line l CLK\_TO\_MAC
+33 in line l _RESET_
Added: usrp-hw/trunk/sym/generated/dp83865-JTAG.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-JTAG.src
(rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-JTAG.src 2006-09-13 05:26:20 UTC
(rev 3529)
@@ -0,0 +1,58 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-JTAG
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 3 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+32 in dot l _TRST_
+31 in line l TDI
+28 out line l TDO
+27 in line l TMS
+24 clk clk l TCK
+
+
Added: usrp-hw/trunk/sym/generated/dp83865-MAC.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MAC.src (rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-MAC.src 2006-09-13 05:26:20 UTC (rev
3529)
@@ -0,0 +1,77 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=2400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-MAC
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 4 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+39 io line l COL/CLK\_MAC\_FREQ
+40 io line l CRS/RGMII\_SEL0
+60 io line l TX\_CLK/RGMII\_SEL1
+76 in line r TXD0
+75 in line r TXD1
+72 in line r TXD2
+71 in line r TXD3
+68 in line r TXD4
+67 in line r TXD5
+66 in line r TXD6
+65 in line r TXD7
+62 in line r TX\_EN/TX\_EN\ER
+79 in line r GTX\_CLK/TCK
+61 in line r TX\_ER
+57 out line l RX\_CLK
+56 out line l RXD0
+55 out line l RXD1
+52 out line l RXD2
+51 out line l RXD3
+50 out line l RXD4
+47 out line l RXD5
+46 out line l RXD6
+45 out line l RXD7
+41 out line l RX\_ER/RXDV\ER
+44 out line l RX\_DV/RCK
+
Added: usrp-hw/trunk/sym/generated/dp83865-MDI.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MDI.src (rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-MDI.src 2006-09-13 05:26:20 UTC (rev
3529)
@@ -0,0 +1,62 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-MDI
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 2 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+108 io line r MDIA\_P
+109 io dot r _MDIA\_N_
+
+114 io line r MDIB\_P
+115 io dot r _MDIB\_N_
+
+120 io line r MDIC\_P
+121 io dot r _MDIC\_N_
+
+126 io line r MDID\_P
+127 io dot r _MDID\_N_
Added: usrp-hw/trunk/sym/generated/dp83865-MGT.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MGT.src (rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-MGT.src 2006-09-13 05:26:20 UTC (rev
3529)
@@ -0,0 +1,54 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-MGT
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 5 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+81 clk clk l MDC
+80 io line l MDIO
+3 io line l _INTERRUPT_
Added: usrp-hw/trunk/sym/generated/dp83865-PWR.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-PWR.src (rev 0)
+++ usrp-hw/trunk/sym/generated/dp83865-PWR.src 2006-09-13 05:26:20 UTC (rev
3529)
@@ -0,0 +1,125 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=DP83865-PWR
+device=DP83865
+refdes=U?
+footprint=PQFP-128
+description=National Semi GigPHYter Gigabit Ethernet MAC
+documentation=NA
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 1 of 7
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+4 pwr line l IO\_Vdd
+15 pwr line l IO\_Vdd
+21 pwr line l IO\_Vdd
+29 pwr line l IO\_Vdd
+37 pwr line l IO\_Vdd
+42 pwr line l IO\_Vdd
+53 pwr line l IO\_Vdd
+58 pwr line l IO\_Vdd
+69 pwr line l IO\_Vdd
+77 pwr line l IO\_Vdd
+83 pwr line l IO\_Vdd
+90 pwr line l IO\_Vdd
+
+11 pwr line l Core\_Vdd
+19 pwr line l Core\_Vdd
+25 pwr line l Core\_Vdd
+35 pwr line l Core\_Vdd
+48 pwr line l Core\_Vdd
+63 pwr line l Core\_Vdd
+73 pwr line l Core\_Vdd
+92 pwr line l Core\_Vdd
+
+101 pwr line l 2V5\_Avdd1
+96 pwr line l 2V5\_Avdd2
+
+103 pwr line l 1V8\_AVdd1
+105 pwr line l 1V8\_AVdd1
+111 pwr line l 1V8\_AVdd1
+117 pwr line l 1V8\_AVdd1
+123 pwr line l 1V8\_AVdd1
+
+98 pwr line l 1V8\_AVdd2
+100 pwr line l 1V8\_AVdd3
+
+5 pwr line r Vss
+12 pwr line r Vss
+16 pwr line r Vss
+20 pwr line r Vss
+22 pwr line r Vss
+26 pwr line r Vss
+30 pwr line r Vss
+36 pwr line r Vss
+38 pwr line r Vss
+43 pwr line r Vss
+49 pwr line r Vss
+54 pwr line r Vss
+59 pwr line r Vss
+64 pwr line r Vss
+70 pwr line r Vss
+74 pwr line r Vss
+78 pwr line r Vss
+82 pwr line r Vss
+91 pwr line r Vss
+93 pwr line r Vss
+97 pwr line r Vss
+99 pwr line r Vss
+104 pwr line r Vss
+106 pwr line r Vss
+107 pwr line r Vss
+110 pwr line r Vss
+112 pwr line r Vss
+113 pwr line r Vss
+116 pwr line r Vss
+118 pwr line r Vss
+119 pwr line r Vss
+122 pwr line r Vss
+124 pwr line r Vss
+125 pwr line r Vss
+128 pwr line r Vss
+
+102 in line b BG\_REF
+2 in line l NC
+23 in line l NC
+84 in line l NC
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