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[Commit-gnuradio] r3820 - usrp-hw/trunk/sym/generated


From: matt
Subject: [Commit-gnuradio] r3820 - usrp-hw/trunk/sym/generated
Date: Thu, 19 Oct 2006 01:17:37 -0600 (MDT)

Author: matt
Date: 2006-10-19 01:17:37 -0600 (Thu, 19 Oct 2006)
New Revision: 3820

Modified:
   usrp-hw/trunk/sym/generated/dp83865-CFGLED.src
   usrp-hw/trunk/sym/generated/dp83865-CLK.src
   usrp-hw/trunk/sym/generated/dp83865-JTAG.src
   usrp-hw/trunk/sym/generated/dp83865-MAC.src
   usrp-hw/trunk/sym/generated/dp83865-MDI.src
   usrp-hw/trunk/sym/generated/dp83865-MGT.src
   usrp-hw/trunk/sym/generated/dp83865-PWR.src
Log:
fixed underscores


Modified: usrp-hw/trunk/sym/generated/dp83865-CFGLED.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-CFGLED.src      2006-10-19 01:32:23 UTC 
(rev 3819)
+++ usrp-hw/trunk/sym/generated/dp83865-CFGLED.src      2006-10-19 07:17:37 UTC 
(rev 3820)
@@ -49,19 +49,19 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-1              in      line    l               NON\_IEEE\_STRAP
-6              in      line    l               MAN\_MDIX\_STRAP/TX\_TCLK
-7              io      line    r               ACTIVITY\_LED/SPEED0\_STRAP
-8              io      line    r               LINK10\_LED/RLED/SPEED1\_STRAP
-9              io      line    r               LINK100\_LED/DUPLEX\_STRAP
-10             io      line    r               LINK1000\_LED/AN\_EN\_STRAP
-13             io      line    r               DUPLEX\_LED/PHYADDR0\_STRAP
-14             in      line    l               PHYADDR1\_STRAP
-17             in      line    l               PHYADDR2\_STRAP
-18             in      line    l               PHYADDR3\_STRAP
-95             in      line    l               PHYADDR4\_STRAP
-94             io      line    l               MULTI\_EN\_STRAP/TX\_TRIGGER
-89             io      line    l               MDIX\_EN\_STRAP
-88             in      line    l               MAC\_CLK\_EN\_STRAP/TX\_SYN\_CLK
-34             in      line    l               VDD\_SEL\_STRAP
+1              in      line    l               NON_IEEE_STRAP
+6              in      line    l               MAN_MDIX_STRAP/TX_TCLK
+7              io      line    r               ACTIVITY_LED/SPEED0_STRAP
+8              io      line    r               LINK10_LED/RLED/SPEED1_STRAP
+9              io      line    r               LINK100_LED/DUPLEX_STRAP
+10             io      line    r               LINK1000_LED/AN_EN_STRAP
+13             io      line    r               DUPLEX_LED/PHYADDR0_STRAP
+14             in      line    l               PHYADDR1_STRAP
+17             in      line    l               PHYADDR2_STRAP
+18             in      line    l               PHYADDR3_STRAP
+95             in      line    l               PHYADDR4_STRAP
+94             io      line    l               MULTI_EN_STRAP/TX_TRIGGER
+89             io      line    l               MDIX_EN_STRAP
+88             in      line    l               MAC_CLK_EN_STRAP/TX_SYN_CLK
+34             in      line    l               VDD_SEL_STRAP
 

Modified: usrp-hw/trunk/sym/generated/dp83865-CLK.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-CLK.src 2006-10-19 01:32:23 UTC (rev 
3819)
+++ usrp-hw/trunk/sym/generated/dp83865-CLK.src 2006-10-19 07:17:37 UTC (rev 
3820)
@@ -49,7 +49,7 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-86             clk     clk     l               CLK\_IN
-87             out     line    l               CLK\_OUT
-85             out     line    l               CLK\_TO\_MAC
-33             in      line    l               _RESET_
+86             clk     clk     l               CLK_IN
+87             out     line    l               CLK_OUT
+85             out     line    l               CLK_TO_MAC
+33             in      line    l               \_RESET\_

Modified: usrp-hw/trunk/sym/generated/dp83865-JTAG.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-JTAG.src        2006-10-19 01:32:23 UTC 
(rev 3819)
+++ usrp-hw/trunk/sym/generated/dp83865-JTAG.src        2006-10-19 07:17:37 UTC 
(rev 3820)
@@ -49,7 +49,7 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-32             in      dot     l               _TRST_
+32             in      dot     l               \_TRST\_
 31             in      line    l               TDI
 28             out     line    l               TDO
 27             in      line    l               TMS

Modified: usrp-hw/trunk/sym/generated/dp83865-MAC.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MAC.src 2006-10-19 01:32:23 UTC (rev 
3819)
+++ usrp-hw/trunk/sym/generated/dp83865-MAC.src 2006-10-19 07:17:37 UTC (rev 
3820)
@@ -49,9 +49,9 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-39             io      line    l               COL/CLK\_MAC\_FREQ
-40             io      line    l               CRS/RGMII\_SEL0
-60             io      line    l               TX\_CLK/RGMII\_SEL1
+39             io      line    l               COL/CLK_MAC\_FREQ
+40             io      line    l               CRS/RGMII_SEL0
+60             io      line    l               TX_CLK/RGMII_SEL1
 76             in      line    r               TXD0
 75             in      line    r               TXD1
 72             in      line    r               TXD2
@@ -60,10 +60,10 @@
 67             in      line    r               TXD5
 66             in      line    r               TXD6
 65             in      line    r               TXD7
-62             in      line    r               TX\_EN/TX\_EN\ER
-79             in      line    r               GTX\_CLK/TCK
-61             in      line    r               TX\_ER
-57             out     line    l               RX\_CLK
+62             in      line    r               TX_EN/TX_EN\ER
+79             in      line    r               GTX_CLK/TCK
+61             in      line    r               TX_ER
+57             out     line    l               RX_CLK
 56             out     line    l               RXD0
 55             out     line    l               RXD1
 52             out     line    l               RXD2
@@ -72,6 +72,6 @@
 47             out     line    l               RXD5
 46             out     line    l               RXD6
 45             out     line    l               RXD7
-41             out     line    l               RX\_ER/RXDV\ER
-44             out     line    l               RX\_DV/RCK
+41             out     line    l               RX_ER/RXDV\ER
+44             out     line    l               RX_DV/RCK
 

Modified: usrp-hw/trunk/sym/generated/dp83865-MDI.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MDI.src 2006-10-19 01:32:23 UTC (rev 
3819)
+++ usrp-hw/trunk/sym/generated/dp83865-MDI.src 2006-10-19 07:17:37 UTC (rev 
3820)
@@ -49,14 +49,14 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-108            io      line    r               MDIA\_P
-109            io      dot     r               _MDIA\_N_
+108            io      line    r               MDIA_P
+109            io      dot     r               \_MDIA_N\_
 
-114            io      line    r               MDIB\_P
-115            io      dot     r               _MDIB\_N_
+114            io      line    r               MDIB_P
+115            io      dot     r               \_MDIB_N\_
 
-120            io      line    r               MDIC\_P
-121            io      dot     r               _MDIC\_N_
+120            io      line    r               MDIC_P
+121            io      dot     r               \_MDIC_N\_
 
-126            io      line    r               MDID\_P
-127            io      dot     r               _MDID\_N_
+126            io      line    r               MDID_P
+127            io      dot     r               \_MDID_N\_

Modified: usrp-hw/trunk/sym/generated/dp83865-MGT.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-MGT.src 2006-10-19 01:32:23 UTC (rev 
3819)
+++ usrp-hw/trunk/sym/generated/dp83865-MGT.src 2006-10-19 07:17:37 UTC (rev 
3820)
@@ -51,4 +51,4 @@
 #-----------------------------------------------------
 81             clk     clk     l               MDC
 80             io      line    l               MDIO
-3              io      line    l               _INTERRUPT_
+3              io      line    l               \_INTERRUPT\_

Modified: usrp-hw/trunk/sym/generated/dp83865-PWR.src
===================================================================
--- usrp-hw/trunk/sym/generated/dp83865-PWR.src 2006-10-19 01:32:23 UTC (rev 
3819)
+++ usrp-hw/trunk/sym/generated/dp83865-PWR.src 2006-10-19 07:17:37 UTC (rev 
3820)
@@ -49,39 +49,39 @@
 #-----------------------------------------------------
 #pinnr seq     type    style   posit.  net     label   
 #-----------------------------------------------------
-4              pwr     line    l               IO\_Vdd
-15             pwr     line    l               IO\_Vdd
-21             pwr     line    l               IO\_Vdd
-29             pwr     line    l               IO\_Vdd
-37             pwr     line    l               IO\_Vdd
-42             pwr     line    l               IO\_Vdd
-53             pwr     line    l               IO\_Vdd
-58             pwr     line    l               IO\_Vdd
-69             pwr     line    l               IO\_Vdd
-77             pwr     line    l               IO\_Vdd
-83             pwr     line    l               IO\_Vdd
-90             pwr     line    l               IO\_Vdd
+4              pwr     line    l               IO_Vdd
+15             pwr     line    l               IO_Vdd
+21             pwr     line    l               IO_Vdd
+29             pwr     line    l               IO_Vdd
+37             pwr     line    l               IO_Vdd
+42             pwr     line    l               IO_Vdd
+53             pwr     line    l               IO_Vdd
+58             pwr     line    l               IO_Vdd
+69             pwr     line    l               IO_Vdd
+77             pwr     line    l               IO_Vdd
+83             pwr     line    l               IO_Vdd
+90             pwr     line    l               IO_Vdd
 
-11             pwr     line    l               Core\_Vdd
-19             pwr     line    l               Core\_Vdd
-25             pwr     line    l               Core\_Vdd
-35             pwr     line    l               Core\_Vdd
-48             pwr     line    l               Core\_Vdd
-63             pwr     line    l               Core\_Vdd
-73             pwr     line    l               Core\_Vdd
-92             pwr     line    l               Core\_Vdd
+11             pwr     line    l               Core_Vdd
+19             pwr     line    l               Core_Vdd
+25             pwr     line    l               Core_Vdd
+35             pwr     line    l               Core_Vdd
+48             pwr     line    l               Core_Vdd
+63             pwr     line    l               Core_Vdd
+73             pwr     line    l               Core_Vdd
+92             pwr     line    l               Core_Vdd
 
-101            pwr     line    l               2V5\_Avdd1
-96             pwr     line    l               2V5\_Avdd2
+101            pwr     line    l               2V5_Avdd1
+96             pwr     line    l               2V5_Avdd2
 
-103            pwr     line    l               1V8\_AVdd1
-105            pwr     line    l               1V8\_AVdd1
-111            pwr     line    l               1V8\_AVdd1
-117            pwr     line    l               1V8\_AVdd1
-123            pwr     line    l               1V8\_AVdd1
+103            pwr     line    l               1V8_AVdd1
+105            pwr     line    l               1V8_AVdd1
+111            pwr     line    l               1V8_AVdd1
+117            pwr     line    l               1V8_AVdd1
+123            pwr     line    l               1V8_AVdd1
 
-98             pwr     line    l               1V8\_AVdd2
-100            pwr     line    l               1V8\_AVdd3
+98             pwr     line    l               1V8_AVdd2
+100            pwr     line    l               1V8_AVdd3
 
 5              pwr     line    r               Vss
 12             pwr     line    r               Vss
@@ -119,7 +119,7 @@
 125            pwr     line    r               Vss
 128            pwr     line    r               Vss
 
-102            in      line    b               BG\_REF
+102            in      line    b               BG_REF
 2              in      line    l               NC
 23             in      line    l               NC
 84             in      line    l               NC





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