[Commit-gnuradio] r4835 - gnuradio/branches/developers/matt/u2f/top/u2_basic

[matt]

Author: matt
Date: 2007-03-31 19:37:41 -0600 (Sat, 31 Mar 2007)
New Revision: 4835

Modified:
   gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
Log:
put in basic clock control


Modified: gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v       
2007-04-01 00:16:46 UTC (rev 4834)
+++ gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v       
2007-04-01 01:37:41 UTC (rev 4835)
@@ -86,7 +86,7 @@
    output spi_cpld_en,
    output spi_cpld_dout,
    input spi_cpld_din,
-   output spi_cpld_clk,
+   input spi_cpld_clk,   // temporary bootstrap clock
    
    // ADC
    input [13:0] adc_a,
@@ -113,7 +113,7 @@
    // Clock Gen Control
    output [1:0] clk_en,
    output [1:0] clk_sel,
-   input clk_func,
+   input clk_func,        // FIXME is an output to control the 9510
    input clk_status,
 
    // Clocks
@@ -161,8 +161,22 @@
    output sdi_rx_dac,
 
    inout [15:0] io_rx
-   
    );
+
+   wire        aux_clk = spi_cpld_clk;
    
+   clock_control clock_control 
+     (.reset(),
+      .aux_clk(aux_clk),    // 25MHz, for before fpga clock is active
+      .clk_fpga(clk_fpga),  // real 100 MHz FPGA clock
+      .clk_en(clk_en),      // controls source of reference clock
+      .clk_sel(clk_sel),    // controls source of reference clock
+      .clk_func(clk_func),  // SYNC or reset to 9510
+      .clk_status(clk_status),  // Monitor PLL or SYNC status
+      
+      .sen(sen_clk),        // Enable for the AD9510
+      .sclk(sclk),.sdi(sdi),.sdo(sdo)  // FIXME these need to be shared
+      );
+   
 endmodule // u2_basic