[Commit-gnuradio] r4886 - in gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src: fpga/lib fpga/rbf/rev2 fpga/rbf/rev4 fpga/toplevel python

[jcorgan]

Author: jcorgan
Date: 2007-04-05 15:37:35 -0600 (Thu, 05 Apr 2007)
New Revision: 4886

Modified:
   gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_tx.v
   
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/rbf/rev2/usrp_sar.rbf
   
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/rbf/rev4/usrp_sar.rbf
   
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/toplevel/usrp_sar.v
   gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/python/debug_sar.py
Log:
Work in progress. Triangle waves on TXA I&Q.

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_tx.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_tx.v 
2007-04-05 19:39:37 UTC (rev 4885)
+++ gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_tx.v 
2007-04-05 21:37:35 UTC (rev 4886)
@@ -36,8 +36,18 @@
    output [15:0] tx_q_o;
    output [15:0] debug_o;
    
-   assign tx_i_o = ena_i ? 16'b0111111111111100 : 16'b0;
-   assign tx_q_o = ena_i ? 16'b0111111111111100 : 16'b0;
-   assign debug_0 = 16'hAA55;
+   reg [31:0]   counter;
+
+   always @(posedge clk_i)
+     begin
+       if (rst_i | ~ena_i)
+         counter <= 16'b0;
+       else if (strobe_i)
+         counter = counter + 32'b1;
+     end
+   
+   assign tx_i_o = ena_i ? counter[15:0] : 16'b0;
+   assign tx_q_o = ena_i ? counter[31:16] : 16'b0;
+   assign debug_o = 16'hAA55;
          
 endmodule // sar_tx

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/rbf/rev2/usrp_sar.rbf
===================================================================
(Binary files differ)

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/rbf/rev4/usrp_sar.rbf
===================================================================
(Binary files differ)

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/toplevel/usrp_sar.v
===================================================================
--- 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/toplevel/usrp_sar.v
  2007-04-05 19:39:37 UTC (rev 4885)
+++ 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/toplevel/usrp_sar.v
  2007-04-05 21:37:35 UTC (rev 4886)
@@ -100,18 +100,24 @@
    wire [6:0]  serial_addr;
    wire [31:0] serial_data;
    
+   // Either one will reset both 
+   wire sar_reset = tx_dsp_reset|rx_dsp_reset;
+
    
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
    // Transmit Side
 
    wire [15:0] tx_i, tx_q;
    wire [15:0] tx_debug;
    
-   assign tx_a = tx_sample_strobe ? tx_i[15:2] : tx_q[15:2];
-   assign tx_b = 14'b0;
+   // Multiplex tx_i and tx_q onto TXA DAC pins
+   assign tx_a = tx_sample_strobe ? tx_q[15:2] : tx_i[15:2];
    assign TXSYNC_A = tx_sample_strobe;
-   assign TXSYNC_B = tx_sample_strobe;
 
-   sar_tx 
transmitter(.clk_i(clk64),.rst_i(tx_dsp_reset),.ena_i(enable_tx),.strobe_i(tx_sample_strobe),
+   // Wedge TXB at zero
+   assign tx_b = 14'b0;
+   assign TXSYNC_B = 0;
+   
+   sar_tx 
transmitter(.clk_i(clk64),.rst_i(sar_reset),.ena_i(enable_tx),.strobe_i(tx_sample_strobe),
                      
.saddr_i(serial_addr),.sdata_i(serial_data),.s_strobe_i(serial_strobe),
                      .tx_i_o(tx_i),.tx_q_o(tx_q),.debug_o(tx_debug));
 

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/python/debug_sar.py
===================================================================
--- 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/python/debug_sar.py   
    2007-04-05 19:39:37 UTC (rev 4885)
+++ 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/python/debug_sar.py   
    2007-04-05 21:37:35 UTC (rev 4886)
@@ -1,11 +1,12 @@
 #!/usr/bin/env python
 
-from gnuradio import gr, usrp
+from gnuradio import usrp
 
 def main():
-    u = usrp.sink_c(fpga_filename = 'usrp_sar.rbf')
-    u.start()
-    u.stop()
-
+    transmitter = usrp.sink_c(fpga_filename = 'usrp_sar.rbf')
+    transmitter.start()
+    raw_input()
+    transmitter.stop()
+    
 if __name__ == "__main__":
     main()