[Commit-gnuradio] r7428 - usrp2/trunk/fpga/eth

[matt]

Author: matt
Date: 2008-01-13 20:56:12 -0700 (Sun, 13 Jan 2008)
New Revision: 7428

Modified:
   usrp2/trunk/fpga/eth/rx_prot_engine.v
Log:
matches latest protocol spec


Modified: usrp2/trunk/fpga/eth/rx_prot_engine.v
===================================================================
--- usrp2/trunk/fpga/eth/rx_prot_engine.v       2008-01-14 03:54:54 UTC (rev 
7427)
+++ usrp2/trunk/fpga/eth/rx_prot_engine.v       2008-01-14 03:56:12 UTC (rev 
7428)
@@ -51,8 +51,8 @@
      else if(eop_o | err_o | wr_full_i)
        xfer_active <= 0;
 
-   assign wr_done_o = eop_o;
-   assign wr_error_o = err_o;
+   assign wr_done_o = eop_o & wr_write_o;
+   assign wr_error_o = err_o & wr_write_o;
    assign wr_dat_o = dat_o;
    assign wr_write_o = xfer_active & ~empty;
    assign read = wr_write_o;
@@ -73,7 +73,8 @@
    localparam PROT_HDR2 = 2;
    localparam PROT_HDR3 = 3;
    localparam PROT_HDR4 = 4;
-   localparam PROT_PKT = 5;
+   localparam PROT_HDR5 = 5;
+   localparam PROT_PKT = 6;
 
    // Things to control: flag_i, sop_i, eop_i, err_i, dat_i, write, Rx_mac_rd
    // Inputs to SM: Rx_mac_sop, Rx_mac_eop, Rx_mac_ra, Rx_mac_pa, 
@@ -91,11 +92,13 @@
 
    assign     hdr_adr = {1'b0,prot_state[2:0]};
 
+   wire [7:0] rx_seqnum_p1 = rx_seqnum + 1;
+   
    always @(posedge clk)
      if(rst)
        begin
          prot_state <= PROT_IDLE;
-         flag = 0;
+         flag <= 0;
        end
      else if(prot_state == PROT_IDLE)
        begin
@@ -125,13 +128,17 @@
           end
         PROT_HDR4 : 
           begin
-             prot_state <= PROT_PKT;
-             if(hdr_dat[31:16] != ETH_TYPE)
+             prot_state <= PROT_HDR5;
+             if(hdr_dat[31:16] != Rx_mac_data[31:16])
                flag <= 1;
-             if(hdr_dat[7:0] != rx_seqnum)
-               flag <= 1;
              rx_channel <= hdr_dat[15:8];
           end
+        PROT_HDR5 :
+          begin
+             prot_state <= PROT_PKT;
+             if((rx_seqnum_p1) != Rx_mac_data[15:8])
+               flag <= 1;
+          end
         PROT_PKT : 
           if(Rx_mac_eop | Rx_mac_err)
             prot_state <= PROT_IDLE;
@@ -140,10 +147,10 @@
    always @(posedge clk)
      if(rst)
        rx_seqnum <= 8'hFF;
-     else if(set_stb & (set_addr == 52))
+     else if(set_stb & (set_addr == 54))
        rx_seqnum <= set_data[7:0];
-     else if(write & (prot_state == PROT_HDR4))
+     else if(write & (prot_state == PROT_HDR5) & ((rx_seqnum_p1) == 
Rx_mac_data[15:8]) & ~flag)
        rx_seqnum <= rx_seqnum + 1;
    
-   // Error cases -- Rx_mac_error, BE != 0, bad_seqno
+   // Error cases -- Rx_mac_error, BE != 0
 endmodule // rx_prot_engine