[Commit-gnuradio] r7465 - usrp2/trunk/firmware/lib

[eb]

Author: eb
Date: 2008-01-18 14:11:24 -0700 (Fri, 18 Jan 2008)
New Revision: 7465

Added:
   usrp2/trunk/firmware/lib/ad9510.c
   usrp2/trunk/firmware/lib/ad9510.h
Modified:
   usrp2/trunk/firmware/lib/Makefile.am
   usrp2/trunk/firmware/lib/u2_init.c
Log:
Refactored clock init to use new ad9510_write_reg function.


Modified: usrp2/trunk/firmware/lib/Makefile.am
===================================================================
--- usrp2/trunk/firmware/lib/Makefile.am        2008-01-18 20:53:02 UTC (rev 
7464)
+++ usrp2/trunk/firmware/lib/Makefile.am        2008-01-18 21:11:24 UTC (rev 
7465)
@@ -21,6 +21,7 @@
        libu2fw.a
 
 libu2fw_a_SOURCES = \
+       ad9510.c \
        ad9777.c \
        buffer_pool.c \
        dbsm.c \

Added: usrp2/trunk/firmware/lib/ad9510.c
===================================================================
--- usrp2/trunk/firmware/lib/ad9510.c                           (rev 0)
+++ usrp2/trunk/firmware/lib/ad9510.c   2008-01-18 21:11:24 UTC (rev 7465)
@@ -0,0 +1,38 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "ad9510.h"
+#include "spi.h"
+#include <memory_map.h>
+
+void
+ad9510_write_reg(int regno, uint8_t value)
+{
+  uint32_t v = ((regno & 0xff) << 8) | (value & 0xff);
+  spi_transact(SPI_TXONLY, SPI_SS_AD9510, v, 24, 0);
+}
+
+
+#if 0
+int
+ad9510_read_reg(int regno)
+{
+  // FIXME
+  return 0;
+}
+#endif


Property changes on: usrp2/trunk/firmware/lib/ad9510.c
___________________________________________________________________
Name: svn:eol-style
   + native

Added: usrp2/trunk/firmware/lib/ad9510.h
===================================================================
--- usrp2/trunk/firmware/lib/ad9510.h                           (rev 0)
+++ usrp2/trunk/firmware/lib/ad9510.h   2008-01-18 21:11:24 UTC (rev 7465)
@@ -0,0 +1,30 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef INCLUDED_AD9510_H
+#define INCLUDED_AD9510_H
+
+#include <stdint.h>
+
+/*
+ * Analog Device AD9510 1.2 GHz Clock Distribution IC w/ PLL
+ */
+
+void ad9510_write_reg(int regno, uint8_t value);
+// int  ad9510_read_reg(int regno);
+
+#endif /* INCLUDED_AD9510_H */


Property changes on: usrp2/trunk/firmware/lib/ad9510.h
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: usrp2/trunk/firmware/lib/u2_init.c
===================================================================
--- usrp2/trunk/firmware/lib/u2_init.c  2008-01-18 20:53:02 UTC (rev 7464)
+++ usrp2/trunk/firmware/lib/u2_init.c  2008-01-18 21:11:24 UTC (rev 7465)
@@ -27,6 +27,7 @@
 #include "bool.h"
 #include "mdelay.h"
 #include "ad9777.h"
+#include "ad9510.h"
 
 /*
  * We ought to arrange for this to be called before main, but for now,
@@ -48,19 +49,17 @@
   spi_init();
 
   // Set up basic clocking functions in AD9510
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004500, 24, 0); // CLK2 drives 
distribution
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003D00, 24, 0); // Turn on 
output 1 (FPGA CLK), normal levels
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004B80, 24, 0); // Bypass 
divider 1
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs
+  ad9510_write_reg(0x45, 0x00); // CLK2 drives distribution
+  ad9510_write_reg(0x3D, 0x00); // Turn on output 1 (FPGA CLK), normal levels
+  ad9510_write_reg(0x4B, 0x80); // Bypass divider 1
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
 
   spi_wait();
 
   // Set up PLL for 10 MHz reference
   // Reg 4, A counter, Don't Care
-  // Reg 5, B counter MSBs, 0
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000500, 24, 0);
-  // Reg 6, B counter LSBs, 5
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000605, 24, 0);
+  ad9510_write_reg(0x05, 0x00);  // Reg 5, B counter MSBs, 0
+  ad9510_write_reg(0x06, 0x05);  // Reg 6, B counter LSBs, 5
   // Reg 7, Loss of reference detect, doesn't work yet, 0
 
 #define LOCK_TO_EXT_REF 0
@@ -75,24 +74,24 @@
   // if(I WANT TO LOCK TO A REFERENCE CLOCK) 
   if(LOCK_TO_EXT_REF || LOCK_TO_MIMO_REF) {
     // Reg 8, Charge pump on, dig lock det, positive PFD, 47
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000847, 24, 0);
+    ad9510_write_reg(0x08, 0x47);
   }
   else {
     // Reg 8, Charge pump off, dig lock det, positive PFD, 47
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000800, 24, 0);
+    ad9510_write_reg(0x08, 0x00);
   }
   
   // Reg 9, Charge pump current, 3mA, 40
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000940, 24, 0);
+  ad9510_write_reg(0x09, 0x40);
   // Reg A, Prescalar of 2, everything normal 04
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000A04, 24, 0);
+  ad9510_write_reg(0x0A, 0x04);
   // Reg B, R Div MSBs, 0
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000B00, 24, 0);
+  ad9510_write_reg(0x0B, 0x00);
   // Reg C, R Div LSBs, 1
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00000C01, 24, 0);
+  ad9510_write_reg(0x0C, 0x01);
   // Reg D, Antibacklash, Digital lock det, 0
 
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
 
   spi_wait();
 
@@ -111,31 +110,31 @@
   }
   
   // Set up other clocks
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003C02, 24, 0); // Turn off 
output 0 (unused)
+  ad9510_write_reg(0x3C, 0x02); // Turn off output 0 (unused)
   
   if (THEY_LOCK_TO_ME) {
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003E00, 24, 0); // Turn on 
output 2 (clk_exp_out), normal levels
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004D00, 24, 0); // Turn on Div2
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004C44, 24, 0); // Set Div2 = 
10, output a 10 MHz clock
+    ad9510_write_reg(0x3E, 0x00); // Turn on output 2 (clk_exp_out), normal 
levels
+    ad9510_write_reg(0x4D, 0x00); // Turn on Div2
+    ad9510_write_reg(0x4C, 0x44); // Set Div2 = 10, output a 10 MHz clock
   }
   else {
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003E02, 24, 0); // Turn off 
output 2 (clk_exp_out)
-    spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004D80, 24, 0); // Bypass 
divider 2
+    ad9510_write_reg(0x3E, 0x02); // Turn off output 2 (clk_exp_out)
+    ad9510_write_reg(0x4D, 0x80); // Bypass divider 2
   }
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004001, 24, 0); // Turn off 
output 4 (phy_clk)
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004201, 24, 0); // Turn off 
output 6 (db_tx_clk)
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004301, 24, 0); // Turn off 
output 7 (db_rx_clk)
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs
+  ad9510_write_reg(0x40, 0x01); // Turn off output 4 (phy_clk)
+  ad9510_write_reg(0x42, 0x01); // Turn off output 6 (db_tx_clk)
+  ad9510_write_reg(0x43, 0x01); // Turn off output 7 (db_rx_clk)
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
 
   // Enable ADCs
   output_regs->adc_ctrl = ADC_CTRL_ON;
   
   // Enable clock to ADCs and DACs
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003F00, 24, 0); // Turn on 
output 3 (DAC CLK), normal levels
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004108, 24, 0); // Turn on out 5 
(ADC clk), CMOS
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004F80, 24, 0); // Bypass Div #3
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005380, 24, 0); // Bypass Div #5
-  spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs
+  ad9510_write_reg(0x3F, 0x00); // Turn on output 3 (DAC CLK), normal levels
+  ad9510_write_reg(0x41, 0x08); // Turn on out 5 (ADC clk), CMOS
+  ad9510_write_reg(0x4F, 0x80); // Bypass Div #3
+  ad9510_write_reg(0x53, 0x80); // Bypass Div #5
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
 
   // Set up AD9777 DAC
   ad9777_write_reg(0, R0_1R);