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[Commit-gnuradio] r7534 - in usrp2/trunk: firmware/apps firmware/include
|
From: |
eb |
|
Subject: |
[Commit-gnuradio] r7534 - in usrp2/trunk: firmware/apps firmware/include firmware/lib host/apps host/lib |
|
Date: |
Thu, 31 Jan 2008 19:39:31 -0700 (MST) |
Author: eb
Date: 2008-01-31 19:39:30 -0700 (Thu, 31 Jan 2008)
New Revision: 7534
Modified:
usrp2/trunk/firmware/apps/app_common.c
usrp2/trunk/firmware/apps/gen_eth_packets.c
usrp2/trunk/firmware/apps/rx_only.c
usrp2/trunk/firmware/apps/tx_only.c
usrp2/trunk/firmware/include/usrp2_eth_packet.h
usrp2/trunk/firmware/lib/ethernet.c
usrp2/trunk/firmware/lib/ethernet.h
usrp2/trunk/firmware/lib/memory_map.h
usrp2/trunk/host/apps/rx_samples.cc
usrp2/trunk/host/apps/tx_samples.cc
usrp2/trunk/host/lib/usrp2_basic.cc
usrp2/trunk/host/lib/usrp2_basic.h
Log:
Refactored host and firmware to use new packet format that includes
the reported fifo space, seqno and ack. Currently seqno and ack are
neither being set nor checked.
Modified: usrp2/trunk/firmware/apps/app_common.c
===================================================================
--- usrp2/trunk/firmware/apps/app_common.c 2008-01-31 21:25:54 UTC (rev
7533)
+++ usrp2/trunk/firmware/apps/app_common.c 2008-02-01 02:39:30 UTC (rev
7534)
@@ -41,7 +41,10 @@
{
reply_pkt->ehdr.dst = cmd_pkt->ehdr.src;
reply_pkt->ehdr.ethertype = U2_ETHERTYPE;
- reply_pkt->ehdr._pad = 0;
+ reply_pkt->thdr.flags = 0;
+ reply_pkt->thdr.fifo_status = 0; // written by protocol engine
+ reply_pkt->thdr.seqno = 0; // written by protocol engine
+ reply_pkt->thdr.ack = 0; // written by protocol engine
u2p_set_word0(&reply_pkt->fixed, 0, CONTROL_CHAN);
reply_pkt->fixed.timestamp = timer_regs->time;
}
@@ -159,7 +162,7 @@
void
config_tx_cmd(op_config_tx_t *p)
{
- printf("config_tx_cmd: interp = %d\n", p->interp);
+ // printf("config_tx_cmd: interp = %d\n", p->interp);
// print_rmon_regs();
dsp_tx_regs->freq = p->phase_inc;
Modified: usrp2/trunk/firmware/apps/gen_eth_packets.c
===================================================================
--- usrp2/trunk/firmware/apps/gen_eth_packets.c 2008-01-31 21:25:54 UTC (rev
7533)
+++ usrp2/trunk/firmware/apps/gen_eth_packets.c 2008-02-01 02:39:30 UTC (rev
7534)
@@ -32,6 +32,7 @@
#include "print_rmon_regs.h"
#include <stddef.h>
#include <stdlib.h>
+#include <string.h>
// ----------------------------------------------------------------
@@ -100,11 +101,12 @@
{
u2_eth_packet_t pkt __attribute__((aligned (4)));
+ memset(&pkt, 0, sizeof(pkt));
+
pkt.ehdr.dst = dst_mac_addr;
// src address filled in by mac
pkt.ehdr.ethertype = U2_ETHERTYPE;
- pkt.ehdr._pad = 0x5555;
pkt.fixed.word0 = 0x01234567;
pkt.fixed.timestamp = 0xffffffff;
Modified: usrp2/trunk/firmware/apps/rx_only.c
===================================================================
--- usrp2/trunk/firmware/apps/rx_only.c 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/firmware/apps/rx_only.c 2008-02-01 02:39:30 UTC (rev 7534)
@@ -59,9 +59,9 @@
* ================================================================
*/
-// 4 lines of ethernet hdr + 1 line (word0)
+// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE 5
+#define DSP_RX_FIRST_LINE 6
#define DSP_RX_SAMPLES_PER_FRAME 250
#define DSP_RX_EXTRA_LINES 1 // writes timestamp
Modified: usrp2/trunk/firmware/apps/tx_only.c
===================================================================
--- usrp2/trunk/firmware/apps/tx_only.c 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/firmware/apps/tx_only.c 2008-02-01 02:39:30 UTC (rev 7534)
@@ -54,45 +54,16 @@
#define DSP_TX_BUF_0 4 // eth -> dsp tx (double buffer)
#define DSP_TX_BUF_1 5 // eth -> dsp tx
-
/*
* ================================================================
- * configure DSP RX double buffering state machine
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE 5
-#define DSP_RX_SAMPLES_PER_FRAME 128
-#define DSP_RX_EXTRA_LINES 1 // writes timestamp
-
-// Receive from DSP Rx
-buf_cmd_args_t dsp_rx_recv_args = {
- PORT_DSP,
- DSP_RX_FIRST_LINE,
- BP_LAST_LINE
-};
-
-// send to ethernet
-buf_cmd_args_t dsp_rx_send_args = {
- PORT_ETH,
- 0, // starts with ethernet header in line 0
- 0, // filled in from last_line register
-};
-
-dbsm_t dsp_rx_sm; // the state machine
-
-/*
- * ================================================================
* configure DSP TX double buffering state machine
* ================================================================
*/
-// 4 lines of ethernet hdr + 2 lines (word0 + timestamp)
+// 4 lines of ethernet hdr + + 1 line transport hdr + 2 lines (word0 +
timestamp)
// DSP Tx reads word0 (flags) + timestamp followed by samples
-#define DSP_TX_FIRST_LINE 4
+#define DSP_TX_FIRST_LINE 5
#define DSP_TX_SAMPLES_PER_FRAME 250 // not used except w/ debugging
#define DSP_TX_EXTRA_LINES 2 // reads word0 +
timestamp
@@ -182,8 +153,19 @@
if (status & BPS_ERROR_ALL){
// FIXME rare path, handle error conditions
- putstr("Errors! status = ");
+ putstr("ERR = ");
puthex32_nl(status);
+
+ int r = ethernet_check_errors();
+ putstr("RME = ");
+ puthex8_nl(r);
+
+ if (status & (BPS_ERROR(DSP_TX_BUF_0) | BPS_ERROR(DSP_TX_BUF_1))){
+ dbsm_stop(&dsp_tx_sm);
+ dsp_tx_regs->clear_state = 1; // try to restart
+ dbsm_start(&dsp_tx_sm);
+ return;
+ }
}
dbsm_process_status(&dsp_tx_sm, status);
Modified: usrp2/trunk/firmware/include/usrp2_eth_packet.h
===================================================================
--- usrp2/trunk/firmware/include/usrp2_eth_packet.h 2008-01-31 21:25:54 UTC
(rev 7533)
+++ usrp2/trunk/firmware/include/usrp2_eth_packet.h 2008-02-01 02:39:30 UTC
(rev 7534)
@@ -32,29 +32,30 @@
* All these data structures are BIG-ENDIAN on the wire
*/
-/* The classic 14-byte ethernet header */
-
+/*
+ * \brief The classic 14-byte ethernet header
+ */
typedef struct {
u2_mac_addr_t dst;
u2_mac_addr_t src;
uint16_t ethertype;
-} u2_eth_hdr_t;
+} __attribute__((packed)) u2_eth_hdr_t;
-/*
- * The classic ethernet header + 2 bytes of pad so that our payload
- * (at least inside the U2) is 32-bit aligned. (The buffer memory
- * in the U2 is only word addressable...)
+/*!
+ * \brief USRP2 transport header
+ *
+ * This enables host->usrp2 flow control and dropped packet detection.
*/
typedef struct {
- u2_mac_addr_t dst;
- u2_mac_addr_t src;
- uint16_t ethertype;
- uint16_t _pad; // MBZ. force 32-bit alignment for payload
-} u2_eth_hdr_with_pad_t;
+ uint16_t flags; // MBZ, may be used for channel in future
+ uint16_t fifo_status; // free space in Rx fifo in 32-bit lines
+ uint8_t seqno; // sequence number of this packet
+ uint8_t ack; // sequence number of next packet expected
+} __attribute__((packed)) u2_transport_hdr_t;
/*
- * The fixed header of a USRP2 ethernet packet...
+ * The fixed payload header of a USRP2 ethernet packet...
*
* Basically there's 1 word of flags and routing info, and 1 word
* of timestamp that specifies when the data was received, or
@@ -126,11 +127,12 @@
p->timestamp = htonl(ts);
}
-/*
- * consolidated packet: ethernet header + pad + fixed header
+/*!
+ * \brief consolidated packet: ethernet header + transport header + fixed
header
*/
typedef struct {
- u2_eth_hdr_with_pad_t ehdr;
+ u2_eth_hdr_t ehdr;
+ u2_transport_hdr_t thdr;
u2_fixed_hdr_t fixed;
} u2_eth_packet_t;
@@ -140,11 +142,10 @@
* sizeof(u2_eth_samples_t) == 2048
*/
-#define U2_MAX_SAMPLES 506
+#define U2_MAX_SAMPLES 505
typedef struct {
- u2_eth_hdr_with_pad_t ehdr;
- u2_fixed_hdr_t fixed;
+ u2_eth_packet_t hdrs;
uint32_t samples[U2_MAX_SAMPLES];
} u2_eth_samples_t;
Modified: usrp2/trunk/firmware/lib/ethernet.c
===================================================================
--- usrp2/trunk/firmware/lib/ethernet.c 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/firmware/lib/ethernet.c 2008-02-01 02:39:30 UTC (rev 7534)
@@ -256,3 +256,26 @@
return ok;
}
+
+int
+ethernet_check_errors(void)
+{
+ // these registers are reset when read
+
+ int r = 0;
+ if (eth_mac_read_rmon(0x05) != 0)
+ r |= RME_RX_CRC;
+ if (eth_mac_read_rmon(0x06) != 0)
+ r |= RME_RX_FIFO_FULL;
+ if (eth_mac_read_rmon(0x07) != 0)
+ r |= RME_RX_2SHORT_2LONG;
+
+ if (eth_mac_read_rmon(0x25) != 0)
+ r |= RME_TX_JAM_DROP;
+ if (eth_mac_read_rmon(0x26) != 0)
+ r |= RME_TX_FIFO_UNDER;
+ if (eth_mac_read_rmon(0x27) != 0)
+ r |= RME_TX_FIFO_OVER;
+
+ return r;
+}
Modified: usrp2/trunk/firmware/lib/ethernet.h
===================================================================
--- usrp2/trunk/firmware/lib/ethernet.h 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/firmware/lib/ethernet.h 2008-02-01 02:39:30 UTC (rev 7534)
@@ -49,7 +49,20 @@
bool ethernet_set_mac_addr(const u2_mac_addr_t *t);
+/*
+ * \brief read RMON regs and return error mask
+ */
+int ethernet_check_errors(void);
+#define RME_RX_CRC 0x0001
+#define RME_RX_FIFO_FULL 0x0002
+#define RME_RX_2SHORT_2LONG 0x0004
+
+#define RME_TX_JAM_DROP 0x0010
+#define RME_TX_FIFO_UNDER 0x0020
+#define RME_TX_FIFO_OVER 0x0040
+
+
typedef enum { LS_UNKNOWN, LS_DOWN, LS_UP } eth_link_state_t;
#define S_UNKNOWN (-1) // unknown link speed
Modified: usrp2/trunk/firmware/lib/memory_map.h
===================================================================
--- usrp2/trunk/firmware/lib/memory_map.h 2008-01-31 21:25:54 UTC (rev
7533)
+++ usrp2/trunk/firmware/lib/memory_map.h 2008-02-01 02:39:30 UTC (rev
7534)
@@ -279,12 +279,14 @@
// 1KB of address space (== 256 32-bit write-only regs)
-#define MISC_OUTPUT_BASE 0xD000
-#define BUFFER_POOL_CTRL_BASE 0xD100
-#define DSP_TX_BASE 0xD200
-#define DSP_RX_BASE 0xD280
+#define MISC_OUTPUT_BASE 0xD000
+#define TX_PROTOCOL_ENGINE_BASE 0xD080
+#define RX_PROTOCOL_ENGINE_BASE 0xD0C0
+#define BUFFER_POOL_CTRL_BASE 0xD100
+#define DSP_TX_BASE 0xD200
+#define DSP_RX_BASE 0xD280
-#define LAST_SETTING_REG 0xD3FC // last valid setting register
+#define LAST_SETTING_REG 0xD3FC // last valid setting register
// --- buffer pool control regs ---
@@ -385,6 +387,61 @@
#define MK_RX_CMD(num_lines, lines_per_frame) \
(((num_lines) << 9) | ((lines_per_frame) & 0x1ff))
+/*
+ * --- ethernet tx protocol engine regs (write only) ---
+ *
+ * These registers control the transmit portion of the ethernet
+ * protocol engine (out of USRP2). The protocol engine handles fifo
+ * status and sequence number insertion in outgoing packets, and
+ * automagically generates status packets when required to inform the
+ * host of changes in fifo availability.
+ *
+ * All outgoing packets have their fifo_status field set to the number
+ * of 32-bit lines of fifo available in the ethernet Rx fifo (see
+ * usrp2_eth_packet.h). Seqno's are set if FIXME, else 0.
+ *
+ * FIXME clean this up once we know how it's supposed to behave.
+ */
+
+typedef struct {
+ volatile uint32_t flags; // not yet fully defined (channel?)
+ volatile uint32_t mac_dst0123; // 4 bytes of destination mac addr
+ volatile uint32_t mac_dst45src01; // 2 bytes of dest mac addr; 2 bytes of
src mac addr
+ volatile uint32_t mac_src2345; // 4 bytes of destination mac addr
+ volatile uint32_t seqno; // Write to init seqno. It autoincs on
match
+} tx_proto_engine_regs_t;
+
+#define tx_proto_engine ((tx_proto_engine_regs_t *) TX_PROTOCOL_ENGINE_BASE)
+
+/*
+ * --- ethernet rx protocol engine regs (write only) ---
+ *
+ * These registers control the receive portion of the ethernet
+ * protocol engine (into USRP2). The protocol engine offloads common
+ * packet inspection operations so that firmware has less to do on
+ * "fast path" packets.
+ *
+ * The registers define conditions which must be matched for a packet
+ * to be considered a "fast path" packet. If a received packet
+ * matches the src and dst mac address, ethertype, flags field, and
+ * expected seqno number it is considered a "fast path" packet, and
+ * the expected seqno is updated. If the packet fails to satisfy any
+ * of the above conditions it's a "slow path" packet, and the
+ * corresponding SLOWPATH flag will be set buffer_status register.
+ */
+
+typedef struct {
+ volatile uint32_t flags; // not yet fully defined (channel?)
+ volatile uint32_t mac_dst0123; // 4 bytes of destination mac addr
+ volatile uint32_t mac_dst45src01; // 2 bytes of dest mac addr; 2 bytes of
src mac addr
+ volatile uint32_t mac_src2345; // 4 bytes of destination mac addr
+ volatile uint32_t ethertype_pad; // ethertype in high 16-bits
+} rx_proto_engine_regs_t;
+
+#define rx_proto_engine ((rx_proto_engine_regs_t *) RX_PROTOCOL_ENGINE_BASE)
+
+
+
///////////////////////////////////////////////////
// Simple Programmable Interrupt Controller, Slave 8
Modified: usrp2/trunk/host/apps/rx_samples.cc
===================================================================
--- usrp2/trunk/host/apps/rx_samples.cc 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/host/apps/rx_samples.cc 2008-02-01 02:39:30 UTC (rev 7534)
@@ -95,7 +95,7 @@
fprintf(stderr, " -f FREQ set frequency to FREQ
[default=0]\n");
fprintf(stderr, " -d DECIM set decimation rate to DECIM
[default=32]\n");
fprintf(stderr, " -N NSAMPLES total number of samples to receive
[default=2.5e6]\n");
- fprintf(stderr, " -F SAMPLES_PER_FRAME number of samples in each frame
[default=372]\n");
+ fprintf(stderr, " -F SAMPLES_PER_FRAME number of samples in each frame
[default=371]\n");
fprintf(stderr, " -S SCALE fpga scaling factor for I & Q
[default=256]\n");
}
@@ -118,7 +118,7 @@
double freq = 0;
int32_t decim = 32;
int32_t nsamples = static_cast<int32_t>(2.5e6);
- int32_t samples_per_frame = 372;
+ int32_t samples_per_frame = 371;
int32_t scale = 256;
int ch;
@@ -257,7 +257,7 @@
total_samples_recvd += n;
- history.push_back(pkt_info(n, u2p_timestamp(&pkt.fixed)));
+ history.push_back(pkt_info(n, u2p_timestamp(&pkt.hdrs.fixed)));
// convert_samples_to_complex(n, pkt.samples, c_samples);
// size_t r = fwrite(c_samples, sizeof(fcomplex), n, of);
@@ -277,10 +277,13 @@
}
- long expected_rx_packets = (nsamples + samples_per_frame -
1)/samples_per_frame;
- long expected_rx_bytes = (expected_rx_packets * 24) + nsamples * 4;
+ long expected_rx_packets =
+ (nsamples + samples_per_frame - 1)/samples_per_frame;
+ long expected_rx_bytes =
+ expected_rx_packets * sizeof(u2_eth_packet_t) + nsamples * 4;
+
long total_pkts_recvd = 0;
total_samples_recvd = 0;
Modified: usrp2/trunk/host/apps/tx_samples.cc
===================================================================
--- usrp2/trunk/host/apps/tx_samples.cc 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/host/apps/tx_samples.cc 2008-02-01 02:39:30 UTC (rev 7534)
@@ -55,7 +55,7 @@
fprintf(stderr, " -r repeat. When EOF of input file is
reached, seek to beginning\n");
fprintf(stderr, " -f FREQ set frequency to FREQ
[default=0]\n");
fprintf(stderr, " -i INTERP set interpolation rate to INTERP
[default=32]\n");
- fprintf(stderr, " -F SAMPLES_PER_FRAME number of samples in each frame
[default=372]\n");
+ fprintf(stderr, " -F SAMPLES_PER_FRAME number of samples in each frame
[default=371]\n");
fprintf(stderr, " -S SCALE fpga scaling factor for I & Q
[default=256]\n");
}
@@ -68,7 +68,7 @@
const char *mac_addr_str = 0;
double freq = 0;
int32_t interp = 32;
- int32_t samples_per_frame = 372;
+ int32_t samples_per_frame = 371;
int32_t scale = 256;
int ch;
@@ -184,8 +184,8 @@
}
u2_eth_samples_t pkt;
- u2p_set_word0(&pkt.fixed, U2P_TX_IMMEDIATE | U2P_TX_START_OF_BURST, 0);
- u2p_set_timestamp(&pkt.fixed, T_NOW);
+ u2p_set_word0(&pkt.hdrs.fixed, U2P_TX_IMMEDIATE | U2P_TX_START_OF_BURST, 0);
+ u2p_set_timestamp(&pkt.hdrs.fixed, T_NOW);
while (1){
Modified: usrp2/trunk/host/lib/usrp2_basic.cc
===================================================================
--- usrp2/trunk/host/lib/usrp2_basic.cc 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/host/lib/usrp2_basic.cc 2008-02-01 02:39:30 UTC (rev 7534)
@@ -101,12 +101,7 @@
};
command *c = (command *) pktbuf;
- c->h.ehdr.ethertype = htons(U2_ETHERTYPE);
- c->h.ehdr._pad = time(0);
- c->h.ehdr.dst = broadcast_mac_addr;
- memcpy(&c->h.ehdr.src, d_ethernet->mac(), 6);
- u2p_set_word0(&c->h.fixed, 0, CONTROL_CHAN);
- u2p_set_timestamp(&c->h.fixed, -1);
+ init_etf_hdrs(&c->h, broadcast_mac_addr, 0, CONTROL_CHAN, -1);
c->op_id.opcode = OP_ID;
c->op_id.len = sizeof(op_id_t);
@@ -182,7 +177,7 @@
double freq,
unsigned int decim,
unsigned int total_samples, // [9, 2**23 - 1]
- unsigned int samples_per_frame, // [9, 372] or [9, 506]
if MTU==2034
+ unsigned int samples_per_frame, // [9, 371] or [9, 505]
if MTU==2034
int scale_i, // 16.0 fixed point
format
int scale_q // 16.0 fixed point
format
)
@@ -200,18 +195,13 @@
return false;
}
- if (samples_per_frame < 9 || samples_per_frame > 506){
+ if (samples_per_frame < 9 || samples_per_frame > U2_MAX_SAMPLES){
std::cerr << "usrp2_basic::start_rx: samples_per_frame is out of range\n";
return false;
}
command *c = (command *) pktbuf;
- c->h.ehdr.ethertype = htons(U2_ETHERTYPE);
- c->h.ehdr._pad = 0;
- c->h.ehdr.dst = which;
- memcpy(&c->h.ehdr.src, d_ethernet->mac(), 6);
- u2p_set_word0(&c->h.fixed, 0, CONTROL_CHAN);
- u2p_set_timestamp(&c->h.fixed, -1);
+ init_etf_hdrs(&c->h, which, 0, CONTROL_CHAN, -1);
c->op.opcode = OP_START_RX;
c->op.len = sizeof(op_start_rx_t);
@@ -243,12 +233,7 @@
};
command *c = (command *) pktbuf;
- c->h.ehdr.ethertype = htons(U2_ETHERTYPE);
- c->h.ehdr._pad = 0;
- c->h.ehdr.dst = which;
- memcpy(&c->h.ehdr.src, d_ethernet->mac(), 6);
- u2p_set_word0(&c->h.fixed, 0, CONTROL_CHAN);
- u2p_set_timestamp(&c->h.fixed, -1);
+ init_etf_hdrs(&c->h, which, 0, CONTROL_CHAN, -1);
c->op_stop_rx.opcode = OP_STOP_RX;
c->op_stop_rx.len = sizeof(op_stop_rx_t);
@@ -276,12 +261,7 @@
};
command *c = (command *) pktbuf;
- c->h.ehdr.ethertype = htons(U2_ETHERTYPE);
- c->h.ehdr._pad = 0;
- c->h.ehdr.dst = which;
- memcpy(&c->h.ehdr.src, d_ethernet->mac(), 6);
- u2p_set_word0(&c->h.fixed, 0, CONTROL_CHAN);
- u2p_set_timestamp(&c->h.fixed, -1);
+ init_etf_hdrs(&c->h, which, 0, CONTROL_CHAN, -1);
c->op.opcode = OP_CONFIG_TX;
c->op.len = sizeof(op_config_tx_t);
@@ -353,12 +333,8 @@
if (nsamples > U2_MAX_SAMPLES)
return false;
- // fill in ethernet header
- pkt->ehdr.ethertype = htons(U2_ETHERTYPE);
- pkt->ehdr._pad = 0;
- pkt->ehdr.dst = which;
- memcpy(&pkt->ehdr.src, d_ethernet->mac(), 6);
-
+ init_et_hdrs(&pkt->hdrs, which);
+
size_t len = sizeof(u2_eth_packet_t) + nsamples * sizeof(uint32_t);
int n = d_ethernet->write_packet(pkt, len);
if (n <= 0)
@@ -396,12 +372,7 @@
};
command *c = (command *) pktbuf;
- c->h.ehdr.ethertype = htons(U2_ETHERTYPE);
- c->h.ehdr._pad = 0;
- c->h.ehdr.dst = which;
- memcpy(&c->h.ehdr.src, d_ethernet->mac(), 6);
- u2p_set_word0(&c->h.fixed, 0, CONTROL_CHAN);
- u2p_set_timestamp(&c->h.fixed, -1);
+ init_etf_hdrs(&c->h, which, 0, CONTROL_CHAN, -1);
c->op.opcode = OP_BURN_MAC_ADDR;
c->op.len = sizeof(op_burn_mac_addr_t);
@@ -413,7 +384,28 @@
return true;
}
+void
+usrp2_basic::init_etf_hdrs(u2_eth_packet_t *p,
+ const u2_mac_addr_t &dst,
+ int word0_flags, int chan, uint32_t timestamp)
+{
+ init_et_hdrs(p, dst);
+ u2p_set_word0(&p->fixed, 0, chan);
+ u2p_set_timestamp(&p->fixed, timestamp);
+}
+void
+usrp2_basic::init_et_hdrs(u2_eth_packet_t *p, const u2_mac_addr_t &dst)
+{
+ p->ehdr.ethertype = htons(U2_ETHERTYPE);
+ p->ehdr.dst = dst;
+ memcpy(&p->ehdr.src, d_ethernet->mac(), 6);
+
+ p->thdr.flags = 0; // FIXME transport header values?
+ p->thdr.seqno = 0;
+ p->thdr.ack = 0;
+}
+
// ------------------------------------------------------------------------
bool
Modified: usrp2/trunk/host/lib/usrp2_basic.h
===================================================================
--- usrp2/trunk/host/lib/usrp2_basic.h 2008-01-31 21:25:54 UTC (rev 7533)
+++ usrp2/trunk/host/lib/usrp2_basic.h 2008-02-01 02:39:30 UTC (rev 7534)
@@ -35,6 +35,12 @@
GRI_ETHERNET *d_ethernet;
gri_pktfilter *d_pf;
+ void init_et_hdrs(u2_eth_packet_t *p, const u2_mac_addr_t &dst);
+
+ void init_etf_hdrs(u2_eth_packet_t *p,
+ const u2_mac_addr_t &dst,
+ int word0_flags, int chan, uint32_t timestamp);
+
public:
usrp2_basic();
~usrp2_basic();
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- [Commit-gnuradio] r7534 - in usrp2/trunk: firmware/apps firmware/include firmware/lib host/apps host/lib,
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