[Commit-gnuradio] r8115 - usrp2/trunk/fpga/top/u2_rev2

[matt]

Author: matt
Date: 2008-03-26 00:42:43 -0600 (Wed, 26 Mar 2008)
New Revision: 8115

Modified:
   usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
Log:
compiles now, but fails timing for some reason


Modified: usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
===================================================================
--- usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v      2008-03-25 22:59:46 UTC (rev 
8114)
+++ usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v      2008-03-26 06:42:43 UTC (rev 
8115)
@@ -4,7 +4,7 @@
 module u2_rev2
   (
    // Misc, debug
-   output leds[4:0],
+   output [4:0] leds,
    output [31:0] debug,
    output [1:0] debug_clk,
    output uart_tx_o,
@@ -153,8 +153,7 @@
 
    // FPGA-specific pins connections
    wire        aux_clk = PHY_CLK;
-   //wire      cpld_detached = RAM_A[14]; // FIXME  Hacked on with Blue Wire
-   wire        cpld_detached = SDA_force; // FIXME  Hacked on with Blue Wire
+   wire        cpld_detached = cpld_misc_0; // was SDA_force;
 
    wire        clk_fpga, dsp_clk, clk_div, dcm_out, wb_clk, clock_ready;
 
@@ -226,9 +225,10 @@
 
    // LEDs are active low outputs
    wire        led1_int, led2_int;
-   assign      led1 = ~led1_int;
-   assign      led2 = ~led2_int;
-
+   assign      leds[0] = ~led1_int;
+   assign      leds[1] = ~led2_int;
+   assign      leds[4:2] = 3'b111;
+   
    // SPI
    wire        miso, mosi, sclk_int;
    assign      {sclk,sdi} = (~sen_clk | ~sen_dac) ? {sclk_int,mosi} : 2'b0;
@@ -386,7 +386,8 @@
                     .RAM_WEn           (RAM_WEn),
                     .RAM_OEn           (RAM_OEn),
                     .RAM_LDn           (RAM_LDn), 
-                    .uart_tx_o         (),
+                    .uart_tx_o         (uart_tx_o),
+                    //.uart_rx_i         (uart_rx_i),
                     .uart_rx_i         (),
                     .uart_baud_o       (),
                     .sim_mode          (1'b0),