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[Commit-gnuradio] r8577 - usrp2/trunk/fpga/top/u2_rev2
From: |
matt |
Subject: |
[Commit-gnuradio] r8577 - usrp2/trunk/fpga/top/u2_rev2 |
Date: |
Tue, 10 Jun 2008 17:38:43 -0600 (MDT) |
Author: matt
Date: 2008-06-10 17:38:42 -0600 (Tue, 10 Jun 2008)
New Revision: 8577
Modified:
usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
Log:
remove the use of aux_clk since we don't need it on this hardware rev. This
helps meet timing.
Modified: usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
===================================================================
--- usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v 2008-06-10 23:34:35 UTC (rev
8576)
+++ usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v 2008-06-10 23:38:42 UTC (rev
8577)
@@ -153,8 +153,6 @@
assign cpld_init_b = 0;
// FPGA-specific pins connections
- wire aux_clk = PHY_CLK;
-
wire clk_fpga, dsp_clk, clk_div, dcm_out, wb_clk, clock_ready;
IBUFGDS clk_fpga_pin (.O(clk_fpga),.I(clk_fpga_p),.IB(clk_fpga_n));
@@ -169,12 +167,10 @@
defparam exp_pps_out_pin.IOSTANDARD = "LVDS_25";
reg [5:0] clock_ready_d;
- always @(posedge aux_clk)
+ always @(posedge clk_fpga)
clock_ready_d[5:0] <= {clock_ready_d[4:0],clock_ready};
-
wire dcm_rst = ~&clock_ready_d & |clock_ready_d;
- wire clk_muxed = clock_ready ? clk_fpga : aux_clk;
-
+
wire adc_on_a, adc_on_b, adc_oe_a, adc_oe_b;
assign adc_oen_a = ~adc_oe_a;
assign adc_oen_b = ~adc_oe_b;
@@ -202,7 +198,7 @@
// Handle Clocks
DCM DCM_INST (.CLKFB(dsp_clk),
- .CLKIN(clk_muxed),
+ .CLKIN(clk_fpga),
.DSSEN(0),
.PSCLK(0),
.PSEN(0),
@@ -343,7 +339,6 @@
.MDC (MDC),
.PHY_INTn (PHY_INTn),
.PHY_RESETn (PHY_RESETn),
- .PHY_CLK (PHY_CLK),
.ser_enable (ser_enable),
.ser_prbsen (ser_prbsen),
.ser_loopen (ser_loopen),
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