[Commit-gnuradio] r8718 - usrp2/trunk/fpga/control_lib

[matt]

Author: matt
Date: 2008-06-25 23:07:11 -0600 (Wed, 25 Jun 2008)
New Revision: 8718

Added:
   usrp2/trunk/fpga/control_lib/medfifo.v
Log:
cascaded shortfifos to make a longer one, primarily for the simple uart fifos


Added: usrp2/trunk/fpga/control_lib/medfifo.v
===================================================================
--- usrp2/trunk/fpga/control_lib/medfifo.v                              (rev 0)
+++ usrp2/trunk/fpga/control_lib/medfifo.v      2008-06-26 05:07:11 UTC (rev 
8718)
@@ -0,0 +1,61 @@
+
+module medfifo
+  #(parameter WIDTH=32,
+    parameter DEPTH=0)
+    (input clk, input rst,
+     input [WIDTH-1:0] datain,
+     output reg [WIDTH-1:0] dataout,
+     input read,
+     input write,
+     input clear,
+     output reg full,
+     output reg empty,
+     output [3:0] space,
+     output [3:0] occupied);
+
+   localparam          NUM_FIFOS = (1<<DEPTH);
+   
+   reg [WIDTH-1:0]     din [0:NUM_FIFOS-1];
+   wire [WIDTH-1:0]    dout [0:NUM_FIFOS-1];
+   reg                         wr [0:NUM_FIFOS-1];
+   reg                         rd [0:NUM_FIFOS-1];
+   wire                full_x [0:NUM_FIFOS-1];
+   wire                empty_x [0:NUM_FIFOS-1];
+   wire [3:0]          space_x [0:NUM_FIFOS-1];
+   wire [3:0]          occupied_x [0:NUM_FIFOS-1];
+   
+   genvar              i;
+   generate
+      for(i = 0; i < NUM_FIFOS ; i = i + 1)
+       begin : gen_depth
+          shortfifo #(.WIDTH(WIDTH))
+            shortfifo (.clk(clk),.rst(rst),
+                       .datain(din[i]),.write(wr[i]),.full(full_x[i]),
+                       .dataout(dout[i]),.read(rd[i]),.empty(empty_x[i]),
+                       
.clear(clear),.space(space_x[i]),.occupied(occupied_x[i]) );
+       end
+   endgenerate
+
+   integer j;
+   always @*
+     begin
+       din[0] = datain;
+       wr[0] = write;
+       full = full_x[0];
+       
+       for(j = 1; j < NUM_FIFOS; j = j + 1)
+         begin
+            din[j] = dout[j-1];
+            wr[j] = ~full_x[j] & ~empty_x[j-1];
+            rd[j-1] = ~full_x[j] & ~empty_x[j-1];
+         end
+
+       dataout = dout[NUM_FIFOS-1];
+       rd[NUM_FIFOS-1] = read;
+       empty = empty_x[NUM_FIFOS-1];
+     end // always @ *
+
+   assign space = space_x[0];
+   assign occupied = occupied_x[NUM_FIFOS-1];
+   
+endmodule // medfifo