[Commit-gnuradio] r9043 - in gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib: . testbenches

[gnychis]

Author: gnychis
Date: 2008-07-29 12:59:53 -0600 (Tue, 29 Jul 2008)
New Revision: 9043

Modified:
   
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/rx_buffer_inband.v
   
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
Log:
work in progress on timestamp testbench

Modified: 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/rx_buffer_inband.v
===================================================================
--- 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/rx_buffer_inband.v
   2008-07-29 17:10:50 UTC (rev 9042)
+++ 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/rx_buffer_inband.v
   2008-07-29 18:59:53 UTC (rev 9043)
@@ -38,6 +38,8 @@
     input wire [31:0] rssi_2, input wire [31:0] rssi_3,
     input wire [1:0] tx_underrun
     );
+  
+    wire [7:0] debug;
     
     parameter NUM_CHAN = 1;
     genvar i ;
@@ -181,8 +183,6 @@
     end
   endgenerate
        
-  wire [7:0] debug;
-        
   fifo_1kx16 rx_cmd_fifo (
     .aclr ( reset ),
     .clock ( rxclk ),

Modified: 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
===================================================================
--- 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
  2008-07-29 17:10:50 UTC (rev 9042)
+++ 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
  2008-07-29 18:59:53 UTC (rev 9043)
@@ -26,6 +26,16 @@
   reg [31:0] serial_data;
   reg serial_strobe;
   wire [15:0] debugbus;
+  reg rx_WR;
+  reg [15:0] rx_databus;
+  reg rx_WR_done;
+  wire rx_WR_enabled;
+  reg [31:0] rssi_0;
+  reg [31:0] rssi_1;
+  reg [31:0] rssi_2;
+  reg [31:0] rssi_3;
+  reg [1:0] tx_underrun;
+
   reg [11:0] signal;
 
   rx_buffer_inband rx_buffer
@@ -33,8 +43,10 @@
       .reset(reset), .reset_regs(reset_regs), .clock_reset(clock_reset), 
.usbdata(usbdata),
       .RD(RD), .have_pkt_rdy(have_pkt_rdy), .rx_overrun(rx_overrun), 
.channels(channels),
       .ch_0(ch_0), .ch_1(ch_1), .ch_2(ch_2), .ch_3(ch_3), .ch_4(ch_4), 
.ch_5(ch_5), .ch_6(ch_6), .ch_7(ch_7),
-      .rxclk(rxclk), .rxstrobe(rxstrobe), .clear_status(clear_status), 
.serial_addr(serial_addr),
-      .serial_strobe(serial_strobe), .debugbus(debugbus));
+      .rxclk(rxclk), .rxstrobe(rxstrobe), .clear_status(clear_status), 
.serial_addr(serial_addr), .serial_data(serial_data),
+      .serial_strobe(serial_strobe), .debugbus(debugbus), .rx_WR(rx_WR), 
.rx_databus(rx_databus),
+      .rx_WR_done(rx_WR_done), .rx_WR_enabled(rx_WR_enabled), .rssi_0(rssi_0), 
.rssi_1(rssi_1), .rssi_2(rssi_2),
+      .rssi_3(rssi_3), .tx_underrun(tx_underrun));
 
   // I am not sure of this...
   strobe_gen sgen