[Commit-gnuradio] r9222 - gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy

[trondeau]

Author: trondeau
Date: 2008-08-10 13:41:12 -0600 (Sun, 10 Aug 2008)
New Revision: 9222

Modified:
   gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.cc
   gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.h
   
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_standard.h
Log:
wip: generalizing some functions to take care of differences between rx and tx; 
should make transition to new daughterboards easier.

Modified: 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.cc
===================================================================
--- 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.cc    
    2008-08-10 19:40:12 UTC (rev 9221)
+++ 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.cc    
    2008-08-10 19:41:12 UTC (rev 9222)
@@ -75,6 +75,71 @@
 }
 
 
+static int
+slot_id_to_oe_reg (int slot_id)
+{
+  static int reg[4]  = { FR_OE_0, FR_OE_1, FR_OE_2, FR_OE_3 };
+  assert (0 <= slot_id && slot_id < 4);
+  return reg[slot_id];
+}
+
+static int
+slot_id_to_io_reg (int slot_id)
+{
+  static int reg[4]  = { FR_IO_0, FR_IO_1, FR_IO_2, FR_IO_3 };
+  assert (0 <= slot_id && slot_id < 4);
+  return reg[slot_id];
+}
+
+float 
+calc_dxc_freq(float target_freq, float baseband_freq, long fs, bool &inverted)
+{
+  /*
+    Calculate the frequency to use for setting the digital up or down 
converter.
+    
+    @param target_freq: desired RF frequency (Hz)
+    @type  target_freq: number
+    @param baseband_freq: the RF frequency that corresponds to DC in the IF.
+    @type  baseband_freq: number
+    @param fs: converter sample rate
+    @type  fs: number
+    
+    @returns: 2-tuple (ddc_freq, inverted) where ddc_freq is the value
+      for the ddc and inverted is True if we're operating in an inverted
+      Nyquist zone.
+  */
+
+  float delta = target_freq - baseband_freq;
+    
+  if(delta >= 0) {
+    while(delta > fs) {
+      delta -= fs;
+    }
+    if(delta <= fs/2) {
+      inverted = false;
+      return (-delta);         // non-inverted region
+    }
+    else {
+      inverted = true;
+      return (delta - fs);     // inverted region
+    }
+  }
+  else {
+    while(delta < -fs) {
+      delta += fs;
+    }
+    if(delta >= -fs/2) {
+      inverted = false;
+      return (-delta);         // non-inverted region
+    }
+    else {
+      inverted = true;
+      return (delta + fs);     // inverted region
+    }
+  }
+}
+
+
 //////////////////////////////////////////////////////////////////
 //
 //                     usrp_basic
@@ -106,11 +171,13 @@
                        struct usb_dev_handle *
                        open_interface (struct usb_device *dev),
                        const std::string fpga_filename,
-                       const std::string firmware_filename)
+                       const std::string firmware_filename,
+                       bool tx)
   : d_udh (0),
     d_usb_data_rate (16000000),        // SWAG, see below
     d_bytes_per_poll ((int) (POLLING_INTERVAL * d_usb_data_rate)),
-    d_verbose (false)
+    d_verbose (false),
+    d_tx(tx)
 {
   /*
    * SWAG: Scientific Wild Ass Guess.
@@ -160,7 +227,150 @@
     usb_close (d_udh);
 }
 
+
+
+int
+usrp_basic::dboard_to_slot (int dboard)
+{
+  printf("usrp_basic::dboard_to_slot\n");
+  return (dboard << 1) | !(d_tx); 
+
+  // tx=(0,2) rx=(1,3)
+}
+
+/********************************************
+  PGA functions
+********************************************/
+
 bool
+usrp_basic::set_pga(int which, double gain)
+{
+  if(d_tx) {
+    return set_tx_pga(which, gain);
+  }
+  else {
+    return set_rx_pga(which, gain);
+  }
+}
+
+bool
+usrp_basic::set_tx_pga (int which, double gain)
+{
+  if (which < 0 || which > 3)
+    return false;
+
+  gain = std::max (pga_min (), gain);
+  gain = std::min (pga_max (), gain);
+
+  int codec = which >> 1;      // 0 and 1 are same, as are 2 and 3
+
+  int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step());
+
+  return _write_9862 (codec, REG_TX_PGA, int_gain);
+}
+
+bool
+usrp_basic::set_rx_pga (int which, double gain)
+{
+  if (which < 0 || which > 3)
+    return false;
+
+  gain = std::max (pga_min (), gain);
+  gain = std::min (pga_max (), gain);
+
+  int codec = which >> 1;
+  int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B;
+
+  // read current value to get input buffer bypass flag.
+  unsigned char cur_rx;
+  if (!_read_9862 (codec, reg, &cur_rx))
+    return false;
+
+  int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step());
+
+  cur_rx = (cur_rx & RX_X_BYPASS_INPUT_BUFFER) | (int_gain & 0x7f);
+  return _write_9862 (codec, reg, cur_rx);
+}
+
+double 
+usrp_basic::pga_min () const
+{
+  if(d_tx) {
+    return pga_tx_min();
+  }
+  else {
+    return pga_rx_min();
+  }
+}
+
+double 
+usrp_basic::pga_max () const
+{
+  if(d_tx) {
+    return pga_tx_max();
+  }
+  else {
+    return pga_rx_max();
+  }
+}
+
+double 
+usrp_basic::pga (int which) const
+{
+  if(d_tx) {
+    return pga_tx(which);
+  }
+  else {
+    return pga_rx(which);
+  }
+}
+
+double
+usrp_basic::pga_rx (int which) const
+{
+  if (which < 0 || which > 3)
+    return READ_FAILED;
+
+  int codec = which >> 1;
+  int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B;
+  unsigned char v;
+  bool ok = _read_9862 (codec, reg, &v);
+  if (!ok)
+    return READ_FAILED;
+
+  return (pga_db_per_step() * (v & 0x1f)) + pga_min();
+}
+
+double
+usrp_basic::pga_tx (int which) const
+{
+  if (which < 0 || which > 3)
+    return READ_FAILED;
+
+  int codec = which >> 1;
+  unsigned char v;
+  bool ok = _read_9862 (codec, REG_TX_PGA, &v);
+  if (!ok)
+    return READ_FAILED;
+
+  return (pga_db_per_step() * v) + pga_min();
+}
+
+double
+usrp_basic::pga_db_per_step () const
+{
+  if(d_tx) {
+    return pga_tx_db_per_step();
+  }
+  else {
+    return pga_rx_db_per_step();
+  }  
+}
+
+/*****************************************************/
+
+
+bool
 usrp_basic::start ()
 {
   return true;         // nop
@@ -411,8 +621,52 @@
   return std::string (buf, len);
 }
 
+bool
+usrp_basic::_write_oe (int which_dboard, int value, int mask)
+{
+  if (! (0 <= which_dboard && which_dboard <= 1))
+    return false;
 
+  return _write_fpga_reg (slot_id_to_oe_reg (dboard_to_slot (which_dboard)),
+                         (mask << 16) | (value & 0xffff));
+}
+
 bool
+usrp_basic::write_io (int which_dboard, int value, int mask)
+{
+  if (! (0 <= which_dboard && which_dboard <= 1))
+    return false;
+
+  return _write_fpga_reg (slot_id_to_io_reg (dboard_to_slot (which_dboard)),
+                         (mask << 16) | (value & 0xffff));
+}
+
+bool
+usrp_basic::read_io (int which_dboard, int *value)
+{
+  if (! (0 <= which_dboard && which_dboard <= 1))
+    return false;
+
+  int t;
+  int reg = which_dboard + 1;  // FIXME, *very* magic number (fix in 
serial_io.v)
+  bool ok = _read_fpga_reg (reg, &t);
+  if (!ok)
+    return false;
+
+  *value = (t >> 16) & 0xffff; // FIXME, more magic
+  return true;
+}
+
+int
+usrp_basic::read_io (int which_dboard)
+{
+  int  value;
+  if (!read_io (which_dboard, &value))
+    return READ_FAILED;
+  return value;
+}
+
+bool
 usrp_basic::_set_led (int which, bool on)
 {
   return usrp_set_led (d_udh, which, on);
@@ -439,13 +693,15 @@
                              const std::string fpga_filename,
                              const std::string firmware_filename
                              )
-  : usrp_basic (which_board, open_rx_interface, fpga_filename, 
firmware_filename),
+  : usrp_basic (which_board, open_rx_interface, fpga_filename, 
firmware_filename, false),
     d_devhandle (0), d_ephandle (0),
     d_bytes_seen (0), d_first_read (true),
     d_rx_enable (false)
 {
   // initialize rx specific registers
 
+  printf("usrp_basic_rx::usrp_basic_rx\n");
+
   if (!usrp_9862_write_many_all (d_udh, rx_init_regs, sizeof (rx_init_regs))){
     fprintf (stderr, "usrp_basic_rx: failed to init AD9862 RX regs\n");
     throw std::runtime_error ("usrp_basic_rx/init_9862");
@@ -659,58 +915,15 @@
 bool
 usrp_basic_rx::set_pga (int which, double gain)
 {
-  if (which < 0 || which > 3)
-    return false;
-
-  gain = std::max (pga_min (), gain);
-  gain = std::min (pga_max (), gain);
-
-  int codec = which >> 1;
-  int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B;
-
-  // read current value to get input buffer bypass flag.
-  unsigned char cur_rx;
-  if (!_read_9862 (codec, reg, &cur_rx))
-    return false;
-
-  int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step());
-
-  cur_rx = (cur_rx & RX_X_BYPASS_INPUT_BUFFER) | (int_gain & 0x7f);
-  return _write_9862 (codec, reg, cur_rx);
+  return usrp_basic::set_pga(which, gain);
 }
 
 double
 usrp_basic_rx::pga (int which) const
 {
-  if (which < 0 || which > 3)
-    return READ_FAILED;
-
-  int codec = which >> 1;
-  int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B;
-  unsigned char v;
-  bool ok = _read_9862 (codec, reg, &v);
-  if (!ok)
-    return READ_FAILED;
-
-  return (pga_db_per_step() * (v & 0x1f)) + pga_min();
+  return usrp_basic::pga(which);
 }
 
-static int
-slot_id_to_oe_reg (int slot_id)
-{
-  static int reg[4]  = { FR_OE_0, FR_OE_1, FR_OE_2, FR_OE_3 };
-  assert (0 <= slot_id && slot_id < 4);
-  return reg[slot_id];
-}
-
-static int
-slot_id_to_io_reg (int slot_id)
-{
-  static int reg[4]  = { FR_IO_0, FR_IO_1, FR_IO_2, FR_IO_3 };
-  assert (0 <= slot_id && slot_id < 4);
-  return reg[slot_id];
-}
-
 void
 usrp_basic_rx::probe_rx_slots (bool verbose)
 {
@@ -718,6 +931,8 @@
   static int slot_id_map[2] = { SLOT_RX_A, SLOT_RX_B };
   static const char *slot_name[2] = { "RX d'board A", "RX d'board B" };
 
+  printf("usrp_basic_rx::probe_rx_slots\n");
+
   for (int i = 0; i < 2; i++){
     int slot_id = slot_id_map [i];
     const char *msg = 0;
@@ -760,51 +975,6 @@
 }
 
 bool
-usrp_basic_rx::_write_oe (int which_dboard, int value, int mask)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  return _write_fpga_reg (slot_id_to_oe_reg (dboard_to_slot (which_dboard)),
-                         (mask << 16) | (value & 0xffff));
-}
-
-bool
-usrp_basic_rx::write_io (int which_dboard, int value, int mask)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  return _write_fpga_reg (slot_id_to_io_reg (dboard_to_slot (which_dboard)),
-                         (mask << 16) | (value & 0xffff));
-}
-
-bool
-usrp_basic_rx::read_io (int which_dboard, int *value)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  int t;
-  int reg = which_dboard + 1;  // FIXME, *very* magic number (fix in 
serial_io.v)
-  bool ok = _read_fpga_reg (reg, &t);
-  if (!ok)
-    return false;
-
-  *value = (t >> 16) & 0xffff; // FIXME, more magic
-  return true;
-}
-
-int
-usrp_basic_rx::read_io (int which_dboard)
-{
-  int  value;
-  if (!read_io (which_dboard, &value))
-    return READ_FAILED;
-  return value;
-}
-
-bool
 usrp_basic_rx::write_aux_dac (int which_dboard, int which_dac, int value)
 {
   return usrp_basic::write_aux_dac (dboard_to_slot (which_dboard),
@@ -876,7 +1046,7 @@
 usrp_basic_tx::usrp_basic_tx (int which_board, int fusb_block_size, int 
fusb_nblocks,
                              const std::string fpga_filename,
                              const std::string firmware_filename)
-  : usrp_basic (which_board, open_tx_interface, fpga_filename, 
firmware_filename),
+  : usrp_basic (which_board, open_tx_interface, fpga_filename, 
firmware_filename, true),
     d_devhandle (0), d_ephandle (0),
     d_bytes_seen (0), d_first_write (true),
     d_tx_enable (false)
@@ -1097,32 +1267,13 @@
 bool
 usrp_basic_tx::set_pga (int which, double gain)
 {
-  if (which < 0 || which > 3)
-    return false;
-
-  gain = std::max (pga_min (), gain);
-  gain = std::min (pga_max (), gain);
-
-  int codec = which >> 1;      // 0 and 1 are same, as are 2 and 3
-
-  int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step());
-
-  return _write_9862 (codec, REG_TX_PGA, int_gain);
+  return usrp_basic::set_pga(which, gain);
 }
 
 double
 usrp_basic_tx::pga (int which) const
 {
-  if (which < 0 || which > 3)
-    return READ_FAILED;
-
-  int codec = which >> 1;
-  unsigned char v;
-  bool ok = _read_9862 (codec, REG_TX_PGA, &v);
-  if (!ok)
-    return READ_FAILED;
-
-  return (pga_db_per_step() * v) + pga_min();
+  return usrp_basic::pga(which);
 }
 
 void
@@ -1174,51 +1325,6 @@
 }
 
 bool
-usrp_basic_tx::_write_oe (int which_dboard, int value, int mask)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  return _write_fpga_reg (slot_id_to_oe_reg (dboard_to_slot (which_dboard)),
-                         (mask << 16) | (value & 0xffff));
-}
-
-bool
-usrp_basic_tx::write_io (int which_dboard, int value, int mask)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  return _write_fpga_reg (slot_id_to_io_reg (dboard_to_slot (which_dboard)),
-                         (mask << 16) | (value & 0xffff));
-}
-
-bool
-usrp_basic_tx::read_io (int which_dboard, int *value)
-{
-  if (! (0 <= which_dboard && which_dboard <= 1))
-    return false;
-
-  int t;
-  int reg = which_dboard + 1;  // FIXME, *very* magic number (fix in 
serial_io.v)
-  bool ok = _read_fpga_reg (reg, &t);
-  if (!ok)
-    return false;
-
-  *value = t & 0xffff;         // FIXME, more magic
-  return true;
-}
-
-int
-usrp_basic_tx::read_io (int which_dboard)
-{
-  int  value;
-  if (!read_io (which_dboard, &value))
-    return READ_FAILED;
-  return value;
-}
-
-bool
 usrp_basic_tx::write_aux_dac (int which_dboard, int which_dac, int value)
 {
   return usrp_basic::write_aux_dac (dboard_to_slot (which_dboard),

Modified: 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.h 
2008-08-10 19:40:12 UTC (rev 9221)
+++ gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_basic.h 
2008-08-10 19:41:12 UTC (rev 9222)
@@ -42,6 +42,8 @@
 #include <usrp_slots.h>
 #include <string>
 
+float calc_dxc_freq(float target_freq, float baseband_freq, long fs, bool 
&inverted);
+
 struct usb_dev_handle;
 class  fusb_devhandle;
 class  fusb_ephandle;
@@ -53,8 +55,8 @@
 {
 private:
   // NOT IMPLEMENTED
-  usrp_basic (const usrp_basic &rhs);                  // no copy constructor
-  usrp_basic &operator= (const usrp_basic &rhs);       // no assignment 
operator
+  //usrp_basic (const usrp_basic &rhs);                        // no copy 
constructor
+  //usrp_basic &operator= (const usrp_basic &rhs);     // no assignment 
operator
 
   
 protected:
@@ -62,6 +64,8 @@
   int                   d_usb_data_rate;       // bytes/sec
   int                   d_bytes_per_poll;      // how often to poll for 
overruns
   bool                  d_verbose;
+  bool                   d_tx;                  // is this for RX or TX?
+  int                   d_dbid[4];             // daughterboard ID's; 0,1 for 
Rx, 2,3 for Tx
 
   static const int      MAX_REGS = 128;
   unsigned int          d_fpga_shadows[MAX_REGS];
@@ -69,7 +73,8 @@
   usrp_basic (int which_board,
              struct usb_dev_handle *open_interface (struct usb_device *dev),
              const std::string fpga_filename = "",
-             const std::string firmware_filename = "");
+             const std::string firmware_filename = "",
+             bool tx=false);
 
   /*!
    * \brief advise usrp_basic of usb data rate (bytes/sec)
@@ -81,8 +86,81 @@
    * \param usb_data_rate      bytes/sec
    */
   void set_usb_data_rate (int usb_data_rate);
+
+
+  int  dboard_to_slot (int dboard);
+
+
+public:
+  virtual ~usrp_basic ();
+
+  /*!
+   * \brief Return daughterboard ID for given daughterboard slot [0,1].
+   *
+   * \param which_dboard       [0,1] which daughterboard
+   *                            If this is a Tx daughterboard (d_tx=true), 
[0,1] -> [2,3]
+   *                            If this is a Rx daughterboard, select 0 or 1
+   *
+   * \return daughterboard id >= 0 if successful
+   * \return -1 if no daugherboard
+   * \return -2 if invalid EEPROM on daughterboard
+   */
+  int daughterboard_id (int which_dboard) const { return d_dbid[2*(d_tx==true) 
+ which_dboard & 0x1]; }
+
+
+  virtual long converter_rate() const { throw 0; } // throw something real 
+
+  virtual bool set_pga (int which, double gain);
+  bool set_rx_pga(int which, double gain);
+  bool set_tx_pga(int which, double gain);
+
+  /*!
+   * \brief Return programmable gain amplifier gain setting in dB.
+   *
+   * \param which      which A/D [0,3]
+   */
+  virtual double pga (int which) const;
+  double pga_rx (int which) const;
+  double pga_tx (int which) const;
+
+  /*!
+   * \brief Return minimum legal PGA gain in dB.
+   */
+  virtual double pga_min () const;
+  double pga_tx_min () const { return 0.0; }
+  double pga_rx_min () const { return 0.0; }
+
+  /*!
+   * \brief Return maximum legal PGA gain in dB.
+   */
+  virtual double pga_max () const;
+  double pga_tx_max () const { return 20.0; }
+  double pga_rx_max () const { return 20.0; }
+
+  /*!
+   * \brief Return hardware step size of PGA (linear in dB).
+   */
+  virtual double pga_db_per_step () const;
+  double pga_tx_db_per_step () const { return 20.0 / 20; }
+  double pga_rx_db_per_step () const { return 20.0/255; }
   
   /*!
+   * \brief return frequency of master oscillator on USRP
+   */
+  long  fpga_master_clock_freq () const { return 64000000; }
+
+  /*!
+   * \returns usb data rate in bytes/sec
+   */
+  int usb_data_rate () const { return d_usb_data_rate; }
+
+  void set_verbose (bool on) { d_verbose = on; }
+
+  //! magic value used on alternate register read interfaces
+  static const int READ_FAILED = -99999;
+
+  
+  /*!
    * \brief Write auxiliary digital to analog converter.
    *
    * \param slot       Which Tx or Rx slot to write.
@@ -113,25 +191,7 @@
    */
   int read_aux_adc (int slot, int which_adc);
 
-public:
-  virtual ~usrp_basic ();
-
   /*!
-   * \brief return frequency of master oscillator on USRP
-   */
-  long  fpga_master_clock_freq () const { return 64000000; }
-
-  /*!
-   * \returns usb data rate in bytes/sec
-   */
-  int usb_data_rate () const { return d_usb_data_rate; }
-
-  void set_verbose (bool on) { d_verbose = on; }
-
-  //! magic value used on alternate register read interfaces
-  static const int READ_FAILED = -99999;
-
-  /*!
    * \brief Write EEPROM on motherboard or any daughterboard.
    * \param i2c_addr           I2C bus address of EEPROM
    * \param eeprom_offset      byte offset in EEPROM to begin writing
@@ -298,7 +358,51 @@
    */
   std::string _read_spi (int optional_header, int enables, int format, int 
len);
 
+
+
   /*!
+   * \brief Write direction register (output enables) for pins that go to 
daughterboard.
+   *
+   * \param which_dboard       [0,1] which d'board
+   * \param value              value to write into register
+   * \param mask               which bits of value to write into reg
+   *
+   * Each d'board has 16-bits of general purpose i/o.
+   * Setting the bit makes it an output from the FPGA to the d'board.
+   *
+   * This register is initialized based on a value stored in the
+   * d'board EEPROM.  In general, you shouldn't be using this routine
+   * without a very good reason.  Using this method incorrectly will
+   * kill your USRP motherboard and/or daughterboard.
+   */
+  bool _write_oe (int which_dboard, int value, int mask);
+
+  /*!
+   * \brief Write daughterboard i/o pin value
+   *
+   * \param which_dboard       [0,1] which d'board
+   * \param value              value to write into register
+   * \param mask               which bits of value to write into reg
+   */
+  bool write_io (int which_dboard, int value, int mask);
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param which_dboard       [0,1] which d'board
+   * \param value              output
+   */
+  bool read_io (int which_dboard, int *value);
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param which_dboard       [0,1] which d'board
+   * \returns register value if successful, else READ_FAILED
+   */
+  int read_io (int which_dboard);
+
+  /*!
    * \brief Start data transfers.
    * Called in base class to derived class order.
    */
@@ -311,7 +415,10 @@
   bool stop ();
 };
 
-/*!
+
+
+
+/*!
  * \brief class for accessing the receive side of the USRP
  */
 class usrp_basic_rx : public usrp_basic 
@@ -324,7 +431,6 @@
   bool                  d_rx_enable;
 
 protected:
-  int                   d_dbid[2];             // Rx daughterboard ID's
 
   /*!
    * \param which_board             Which USRP board on usb (not particularly 
useful; use 0)
@@ -346,7 +452,6 @@
   void restore_rx (bool on);   // conditional set
 
   void probe_rx_slots (bool verbose);
-  int  dboard_to_slot (int dboard) { return (dboard << 1) | 1; }
 
 public:
   ~usrp_basic_rx ();
@@ -396,16 +501,6 @@
   long adc_rate() const { return converter_rate(); }
   long adc_freq() const { return converter_rate(); }   //!< deprecated method 
name
 
-  /*!
-   * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
-   *
-   * \param which_dboard       [0,1] which Rx daughterboard
-   *
-   * \return daughterboard id >= 0 if successful
-   * \return -1 if no daugherboard
-   * \return -2 if invalid EEPROM on daughterboard
-   */
-  int daughterboard_id (int which_dboard) const { return d_dbid[which_dboard & 
0x1]; }
 
   // ----------------------------------------------------------------
   // routines for controlling the Programmable Gain Amplifier
@@ -433,61 +528,19 @@
   /*!
    * \brief Return minimum legal PGA gain in dB.
    */
-  double pga_min () const { return 0.0; }
+  double pga_min () const { return usrp_basic::pga_min(); }
 
   /*!
    * \brief Return maximum legal PGA gain in dB.
    */
-  double pga_max () const { return 20.0; }
+  double pga_max () const { return usrp_basic::pga_max(); }
 
   /*!
    * \brief Return hardware step size of PGA (linear in dB).
    */
-  double pga_db_per_step () const { return 20.0 / 20; }
+  double pga_db_per_step () const { return usrp_basic::pga_db_per_step(); }
 
   /*!
-   * \brief Write direction register (output enables) for pins that go to 
daughterboard.
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   *
-   * Each d'board has 16-bits of general purpose i/o.
-   * Setting the bit makes it an output from the FPGA to the d'board.
-   *
-   * This register is initialized based on a value stored in the
-   * d'board EEPROM.  In general, you shouldn't be using this routine
-   * without a very good reason.  Using this method incorrectly will
-   * kill your USRP motherboard and/or daughterboard.
-   */
-  bool _write_oe (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Write daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   */
-  bool write_io (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Read daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              output
-   */
-  bool read_io (int which_dboard, int *value);
-
-  /*!
-   * \brief Read daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \returns register value if successful, else READ_FAILED
-   */
-  int read_io (int which_dboard);
-
-  /*!
    * \brief Write auxiliary digital to analog converter.
    *
    * \param which_dboard       [0,1] which d'board
@@ -550,7 +603,7 @@
   bool stop ();
 };
 
-/*!
+/*!
  * \brief class for accessing the transmit side of the USRP
  */
 class usrp_basic_tx : public usrp_basic 
@@ -563,7 +616,6 @@
   bool                  d_tx_enable;
 
  protected:
-  int                   d_dbid[2];             // Tx daughterboard ID's
 
   /*!
    * \param which_board             Which USRP board on usb (not particularly 
useful; use 0)
@@ -585,7 +637,6 @@
   void restore_tx (bool on);   // conditional set
 
   void probe_tx_slots (bool verbose);
-  int  dboard_to_slot (int dboard) { return (dboard << 1) | 0; }
 
 public:
 
@@ -634,6 +685,7 @@
    */
   void wait_for_completion ();
 
+
   // ACCESSORS
 
   //! sampling rate of D/A converter
@@ -641,15 +693,6 @@
   long dac_rate() const { return converter_rate(); }
   long dac_freq() const { return converter_rate(); }   //!< deprecated method 
name
 
-  /*!
-   * \brief Return daughterboard ID for given Tx daughterboard slot [0,1].
-   *
-   * \return daughterboard id >= 0 if successful
-   * \return -1 if no daugherboard
-   * \return -2 if invalid EEPROM on daughterboard
-   */
-  int daughterboard_id (int which_dboard) const { return d_dbid[which_dboard & 
0x1]; }
-
   // ----------------------------------------------------------------
   // routines for controlling the Programmable Gain Amplifier
   /*!
@@ -678,61 +721,19 @@
   /*!
    * \brief Return minimum legal PGA gain in dB.
    */
-  double pga_min () const { return -20.0; }
+  double pga_min () const { return usrp_basic::pga_min(); }
 
   /*!
    * \brief Return maximum legal PGA gain in dB.
    */
-  double pga_max () const { return 0.0; }
+  double pga_max () const { return usrp_basic::pga_max(); }
 
   /*!
    * \brief Return hardware step size of PGA (linear in dB).
    */
-  double pga_db_per_step () const { return 20.0/255; }
+  double pga_db_per_step () const { return usrp_basic::pga_db_per_step(); }
 
   /*!
-   * \brief Write direction register (output enables) for pins that go to 
daughterboard.
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   *
-   * Each d'board has 16-bits of general purpose i/o.
-   * Setting the bit makes it an output from the FPGA to the d'board.
-   *
-   * This register is initialized based on a value stored in the
-   * d'board EEPROM.  In general, you shouldn't be using this routine
-   * without a very good reason.  Using this method incorrectly will
-   * kill your USRP motherboard and/or daughterboard.
-   */
-  bool _write_oe (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Write daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   */
-  bool write_io (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Read daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              return value
-   */
-  bool read_io (int which_dboard, int *value);
-
-  /*!
-   * \brief Read daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \returns register value if successful, else READ_FAILED
-   */
-  int read_io (int which_dboard);
-
-  /*!
    * \brief Write auxiliary digital to analog converter.
    *
    * \param which_dboard       [0,1] which d'board

Modified: 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_standard.h
===================================================================
--- 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_standard.h  
    2008-08-10 19:40:12 UTC (rev 9221)
+++ 
gnuradio/branches/developers/trondeau/dbs/usrp/host/lib/legacy/usrp_standard.h  
    2008-08-10 19:41:12 UTC (rev 9222)
@@ -56,6 +56,10 @@
    * This will be 0, 1, or 2.
    */
   int nducs() const;
+  
+  virtual bool set_rx_freq (int channel, double freq) { throw 0; }
+  virtual bool set_tx_freq (int channel, double freq) { throw 0; }
+
 };
 
 /*!