[Commit-gnuradio] r9500 - usrp2/trunk/firmware/apps

[eb]

Author: eb
Date: 2008-09-04 22:37:20 -0600 (Thu, 04 Sep 2008)
New Revision: 9500

Modified:
   usrp2/trunk/firmware/apps/sd_bounce.c
   usrp2/trunk/firmware/apps/sd_gentest.c
Log:
cleaned up SERDES loopback test code

Modified: usrp2/trunk/firmware/apps/sd_bounce.c
===================================================================
--- usrp2/trunk/firmware/apps/sd_bounce.c       2008-09-05 04:36:23 UTC (rev 
9499)
+++ usrp2/trunk/firmware/apps/sd_bounce.c       2008-09-05 04:37:20 UTC (rev 
9500)
@@ -15,6 +15,10 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+/* 
+ * Loopback SERDES to SERDES
+ */
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -31,9 +35,10 @@
 #include <stddef.h>
 #include <stdlib.h>
 #include <string.h>
-#include <ad9510.h>
+#include <clocks.h>
 
 
+
 // ----------------------------------------------------------------
 
 #define SERDES_RX_BUF_0                0
@@ -66,6 +71,7 @@
 
 // ----------------------------------------------------------------
 
+#if 0
 static bool
 check_packet(int *buf, int nlines)
 {
@@ -86,6 +92,7 @@
 {
   memset_wa(buffer_ram(bufno), 0, BP_NLINES * 4);
 }
+#endif
 
 
 bool
@@ -93,9 +100,8 @@
 {
   hal_toggle_leds(0x2);
 
+#if 0
   int last_line = buffer_pool_status->last_line[buf_this];
-
-  /*
   bool ok = check_packet(buffer_ram(buf_this), last_line);
   static int good = 0;
   static int bad = 0;
@@ -110,7 +116,8 @@
     good = 0;
     bad = 0;
   }
-  */
+#endif
+
   return false;
 }
 
@@ -128,30 +135,11 @@
 {
   u2_init();
 
-  // Get our clock from the mimo interface
-
-  // if(I WANT TO LOCK TO A REFERENCE CLOCK) 
-  // Reg 8, Charge pump on, dig lock det, positive PFD, 47
-  //ad9510_write_reg(0x08, 0x47);
-  //ad9510_write_reg(0x5A, 0x01); // Update Regs
-  // if (LOCK_TO_MIMO_REF)
-
-  // Turn on ref output and choose the MIMO connector
-  output_regs->clk_ctrl = 0x15;
-  // Turn on ref output and choose the SMA connector
-  //output_regs->clk_ctrl = 0x14;
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
   putstr("\nsd_bounce\n");
-  
-  // Set up serdes
-  //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN | SERDES_LOOPEN);
-  output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
 
-  
+  // Get our clock from the mimo interface
+  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);
+
   dbsm_init(&sd_sm, SERDES_RX_BUF_0,
            &sd_recv_args, &sd_send_args,
            sd_rx_inspector);

Modified: usrp2/trunk/firmware/apps/sd_gentest.c
===================================================================
--- usrp2/trunk/firmware/apps/sd_gentest.c      2008-09-05 04:36:23 UTC (rev 
9499)
+++ usrp2/trunk/firmware/apps/sd_gentest.c      2008-09-05 04:37:20 UTC (rev 
9500)
@@ -30,7 +30,7 @@
 #include <stddef.h>
 #include <stdlib.h>
 #include <string.h>
-#include <ad9510.h>
+#include <clocks.h>
 #include <mdelay.h>
 
 // ----------------------------------------------------------------
@@ -100,28 +100,20 @@
 {
   u2_init();
 
+  // We're free running and provide clock to the MIMO interface
+  clocks_mimo_config(MC_WE_DONT_LOCK | MC_PROVIDE_CLK_TO_MIMO);
 
-  // Reg 8, Charge pump on, dig lock det, positive PFD, 47
-  //ad9510_write_reg(0x08, 0x47);
-  // turn on ref input and choose the SMA
-  //output_regs->clk_ctrl = 0x14; 
 
-  // provide a clock for the serdes (THEY_LOCK_TO_ME)
-  ad9510_write_reg(0x3E, 0x00); // Turn on output 2 (clk_exp_out), normal 
levels
-  ad9510_write_reg(0x4D, 0x00); // Turn on Div2
-  ad9510_write_reg(0x4C, 0x44); // Set Div2 = 10, output a 10 MHz clock
-  ad9510_write_reg(0x5A, 0x01); // Update Regs
-
-
   // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
+  // output_regs->debug_mux_ctrl = 1;
+  // hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
+  // hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
 
   putstr("\nsd_gentest\n");
   
-  // Set up serdes
+  // Set up serdes (already enabled)
   //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN | SERDES_LOOPEN);
-  output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
+  //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
 
   init_packets();
 
@@ -139,7 +131,7 @@
   hal_set_timeout(timer_delta);
   int ready_to_send = 0;
 
-  int counter = 0;
+  int counter __attribute__((unused)) = 0;
   int sent = 1;
   int txerr = 0;
   int rxerr = 0;
@@ -235,7 +227,7 @@
 
     if(sent_acc >=10000) {
       printf("\nOverall\tSENT %d\tTXERR %d\t",sent_acc,txerr_acc);
-      printf("RX %d\tERR %d\tCRC %d\tMISSED %d\n",rcvd_acc, rxerr_acc, 
rxcrc_acc, sent_acc-rcvd_acc);
+      printf("RX %d\tERR %d\tCRC %d\tMISSED %d\n\n",rcvd_acc, rxerr_acc, 
rxcrc_acc, sent_acc-rcvd_acc);
       sent_acc = 0;
       txerr_acc = 0;
       rcvd_acc = 0;
@@ -273,5 +265,5 @@
 #endif
   }
   
-  return 1;
+  return 0;
 }