commit-gnuradio
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Commit-gnuradio] r9540 - in gnuradio/branches/developers/ets/inband/usr


From: ets
Subject: [Commit-gnuradio] r9540 - in gnuradio/branches/developers/ets/inband/usrp/fpga: inband_lib inband_lib/tb toplevel/usrp_inband_usb
Date: Mon, 8 Sep 2008 20:59:54 -0600 (MDT)

Author: ets
Date: 2008-09-08 20:59:53 -0600 (Mon, 08 Sep 2008)
New Revision: 9540

Modified:
   
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
   
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tb/rx_buffer_inband_tb.v
   
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
   
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
   
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
Log:
added global timestamp clock

Modified: 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
===================================================================
--- 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/rx_buffer_inband.v 
    2008-09-09 00:48:13 UTC (rev 9539)
+++ 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/rx_buffer_inband.v 
    2008-09-09 02:59:53 UTC (rev 9540)
@@ -52,6 +52,7 @@
 
        //Channel inputs
        input                           rxstrobe,
+       input [31:0]            timestamp,
        input [3:0]                     channels,       //number of channels 
(unused)
        input [15:0]            ch_0,
        input [15:0]            ch_1,
@@ -148,18 +149,6 @@
        assign dbg_sample_counter_1 = dbg_sample_counter[1];
        
        
/////////////////////////////////////////////////////////////////////////
-       // Internal timestamp counter
-       // TODO: this should be external and shared w/ tx
-       reg [31:0] timestamp_counter;
-       
-       always @ (posedge rxclk) begin
-               if (reset)
-                       timestamp_counter <= 32'd0;
-               else 
-                       timestamp_counter <= timestamp_counter + 32'd1;
-       end
-
-       
/////////////////////////////////////////////////////////////////////////
        // Wiring for the channel buffers
 
        // IQ interleaving
@@ -265,8 +254,8 @@
                                
                assign i_header_data[i][`CB_OVERRUN] = 1'b0; //generated in 
channel_buffer
                assign i_header_data[i][`CB_PAYLOAD_LEN] = 9'd0; //not 
currently an input (auto-generated)
-               assign i_header_data[i][`CB_TIMESTAMP] = timestamp_counter;
-               assign i_header_data[i][`CB_TIMESTAMP] = timestamp_counter;
+               assign i_header_data[i][`CB_TIMESTAMP] = timestamp;
+               assign i_header_data[i][`CB_TIMESTAMP] = timestamp;
                
                assign i_header_data[i][`CB_NON_INPUTS] = 0;
 

Modified: 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tb/rx_buffer_inband_tb.v
===================================================================
--- 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tb/rx_buffer_inband_tb.v
       2008-09-09 00:48:13 UTC (rev 9539)
+++ 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tb/rx_buffer_inband_tb.v
       2008-09-09 02:59:53 UTC (rev 9540)
@@ -88,6 +88,7 @@
 
                //Channel inputs
                .rxstrobe(rxstrobe),
+               .timestamp(timestamp),
                .channels(num_chan),
                .ch_0(chan_data_0),
                .ch_1(chan_data_1),
@@ -136,7 +137,7 @@
                ,.dbg_sample_counter_1(dbg_sample_counter_1)
        );
 
-       defparam rx_buffer.NUM_CHAN=1;
+       defparam rx_buffer.NUM_CHAN=2;
 
        /////////////////////////////////////////////
        //generate timestamp

Modified: 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
===================================================================
--- 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tx_buffer_inband.v 
    2008-09-09 00:48:13 UTC (rev 9539)
+++ 
gnuradio/branches/developers/ets/inband/usrp/fpga/inband_lib/tx_buffer_inband.v 
    2008-09-09 02:59:53 UTC (rev 9540)
@@ -2,6 +2,7 @@
   ( //System
     input wire usbclk, input wire bus_reset, input wire reset, 
     input wire [15:0] usbdata, output wire have_space, input wire [3:0] 
channels, 
+    input wire [31:0]  timestamp,
     //output transmit signals
     output wire [15:0] tx_i_0, output wire [15:0] tx_q_0, 
     output wire [15:0] tx_i_1, output wire [15:0] tx_q_1,
@@ -28,7 +29,6 @@
    genvar i ;
     
    /* These will eventually be external register */
-   reg                  [31:0] timestamp_clock ;
    wire                 [7:0]  txstrobe_rate [NUM_CHAN-1:0] ;
    wire                                [31:0] rssi [3:0];
    assign rssi[0] = rssi_0;
@@ -36,13 +36,6 @@
    assign rssi[2] = rssi_2;
    assign rssi[3] = rssi_3;
    
-   always @(posedge txclk)
-       if (reset)
-           timestamp_clock <= 0;
-       else
-           timestamp_clock <= timestamp_clock + 1;
-
-
     /* Connections between tx_usb_fifo_reader and
        cnannel/command processing blocks */
    wire                  [31:0] tx_data_bus ;
@@ -115,7 +108,7 @@
 
        chan_fifo_reader tx_chan_reader 
        (.reset(reset), .tx_clock(txclk), .tx_strobe(txstrobe),
-        .timestamp_clock(timestamp_clock), .samples_format(4'b0),          
+        .timestamp_clock(timestamp), .samples_format(4'b0),          
         .tx_q(tx_q[i]), .tx_i(tx_i[i]), .underrun(chan_underrun[i]),
         .skip(chan_skip[i]), .rdreq(chan_rdreq[i]),
         .fifodata(chan_fifodata[i]), .pkt_waiting(chan_pkt_waiting[i]),
@@ -132,7 +125,7 @@
     .RD(chan_rdreq[NUM_CHAN]), .RD_done(chan_skip[NUM_CHAN]));
 
    cmd_reader tx_cmd_reader
-   (.reset(reset), .txclk(txclk), .timestamp_clock(timestamp_clock), 
.skip(chan_skip[NUM_CHAN]),
+   (.reset(reset), .txclk(txclk), .timestamp_clock(timestamp), 
.skip(chan_skip[NUM_CHAN]),
     .rdreq(chan_rdreq[NUM_CHAN]), .fifodata(chan_fifodata[NUM_CHAN]),
     .pkt_waiting(chan_pkt_waiting[NUM_CHAN]), .rx_databus(rx_databus),
     .rx_WR(rx_WR), .rx_WR_done(rx_WR_done), .rx_WR_enabled(rx_WR_enabled),

Modified: 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
===================================================================
--- 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
        2008-09-09 00:48:13 UTC (rev 9539)
+++ 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
        2008-09-09 02:59:53 UTC (rev 9540)
@@ -31,10 +31,10 @@
 // ====================================================================
 
 // Uncomment this for 1 rx channel (w/ halfband) & 1 transmit channel
-  `include "../include/common_config_1rxhb_1tx.vh"
+//  `include "../include/common_config_1rxhb_1tx.vh"
 
 // Uncomment this for 2 rx channels (w/ halfband) & 2 transmit channels
-//  `include "../include/common_config_2rxhb_2tx.vh"
+  `include "../include/common_config_2rxhb_2tx.vh"
 
 // Uncomment this for 4 rx channels (w/o halfband) & 0 transmit channels
 //`include "../include/common_config_4rx_0tx.vh"

Modified: 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
===================================================================
--- 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
        2008-09-09 00:48:13 UTC (rev 9539)
+++ 
gnuradio/branches/developers/ets/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
        2008-09-09 02:59:53 UTC (rev 9540)
@@ -113,8 +113,20 @@
 
    reg [15:0] debug_counter;
    reg [15:0] loopback_i_0,loopback_q_0;
-   
+  
+       
/////////////////////////////////////////////////////////////////////////
+       // Master timestamp counter
+       reg [31:0] timestamp_counter;
+       
+       always @ (posedge clk64) begin
+               if (tx_dsp_reset | rx_dsp_reset)        //FIXME: does it make 
sense for rx/tx to reset independently?
+                       timestamp_counter <= 32'd0;
+               else 
+                       timestamp_counter <= timestamp_counter + 32'd1;
+       end
 
+  
+
    //Connection RX inband <-> TX inband
    wire rx_WR;
    wire [15:0] rx_databus;
@@ -134,6 +146,7 @@
        tx_buffer_inband tx_buffer
      ( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset),
        .usbdata(usbdata),.WR(WR),.have_space(have_space),
+       .timestamp(timestamp_counter),
        .tx_underrun(tx_underrun),.channels({tx_numchan,1'b0}),
        .tx_i_0(ch0tx),.tx_q_0(ch1tx),
        .tx_i_1(ch2tx),.tx_q_1(ch3tx),
@@ -262,6 +275,7 @@
        .reset_regs(rx_dsp_reset),
        
.usbdata(usbdata_out),.RD(RD),.have_pkt_rdy(have_pkt_rdy),.rx_overrun(rx_overrun),
        .channels(rx_numchan),
+       .timestamp(timestamp_counter),
        .ch_0(ch0rx),.ch_1(ch1rx),
        .ch_2(ch2rx),.ch_3(ch3rx),
        .ch_4(ch4rx),.ch_5(ch5rx),





reply via email to

[Prev in Thread] Current Thread [Next in Thread]