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[Commit-gnuradio] r10209 - in usrp-hw/trunk/sym: . generated xilinx


From: matt
Subject: [Commit-gnuradio] r10209 - in usrp-hw/trunk/sym: . generated xilinx
Date: Mon, 12 Jan 2009 15:39:37 -0700 (MST)

Author: matt
Date: 2009-01-12 15:39:36 -0700 (Mon, 12 Jan 2009)
New Revision: 10209

Added:
   usrp-hw/trunk/sym/xilinx/
   usrp-hw/trunk/sym/xilinx/XC3SD1800ACS484.csv
   usrp-hw/trunk/sym/xilinx/XC3SD1800AFG676.csv
   usrp-hw/trunk/sym/xilinx/XC3SD3400AFG676.csv
   usrp-hw/trunk/sym/xilinx/ff1136_big.txt
   usrp-hw/trunk/sym/xilinx/ff1136_small.txt
   usrp-hw/trunk/sym/xilinx/fg320_table.csv
   usrp-hw/trunk/sym/xilinx/fg456_table.csv
   usrp-hw/trunk/sym/xilinx/xilinxgen1136
   usrp-hw/trunk/sym/xilinx/xilinxgen320
   usrp-hw/trunk/sym/xilinx/xilinxgen456
   usrp-hw/trunk/sym/xilinx/xilinxgen484
   usrp-hw/trunk/sym/xilinx/xilinxgen676
Removed:
   usrp-hw/trunk/sym/generated/XC3SD1800ACS484.csv
   usrp-hw/trunk/sym/generated/XC3SD1800AFG676.csv
   usrp-hw/trunk/sym/generated/XC3SD3400AFG676.csv
   usrp-hw/trunk/sym/generated/fg320_table.csv
   usrp-hw/trunk/sym/generated/fg456_table.csv
   usrp-hw/trunk/sym/generated/xilinxgen320
   usrp-hw/trunk/sym/generated/xilinxgen456
   usrp-hw/trunk/sym/generated/xilinxgen484
   usrp-hw/trunk/sym/generated/xilinxgen676
Log:
moving stuff around


Deleted: usrp-hw/trunk/sym/generated/XC3SD1800ACS484.csv

Deleted: usrp-hw/trunk/sym/generated/XC3SD1800AFG676.csv

Deleted: usrp-hw/trunk/sym/generated/XC3SD3400AFG676.csv

Deleted: usrp-hw/trunk/sym/generated/fg320_table.csv

Deleted: usrp-hw/trunk/sym/generated/fg456_table.csv

Deleted: usrp-hw/trunk/sym/generated/xilinxgen320

Deleted: usrp-hw/trunk/sym/generated/xilinxgen456

Deleted: usrp-hw/trunk/sym/generated/xilinxgen484

Deleted: usrp-hw/trunk/sym/generated/xilinxgen676

Copied: usrp-hw/trunk/sym/xilinx/XC3SD1800ACS484.csv (from rev 10171, 
usrp-hw/trunk/sym/generated/XC3SD1800ACS484.csv)
===================================================================
--- usrp-hw/trunk/sym/xilinx/XC3SD1800ACS484.csv                                
(rev 0)
+++ usrp-hw/trunk/sym/xilinx/XC3SD1800ACS484.csv        2009-01-12 22:39:36 UTC 
(rev 10209)
@@ -0,0 +1,485 @@
+PIN,XC3SD1800ACS484_PIN,XC3SD1800ACS484_BANK,TYPE,DIFF_PAIR,ROW,ROW_#,COLUMN
+A1,GND,GND,GND,,A,1,1
+A2,PROG_B,VCCAUX,CONFIG,,A,1,2
+A3,IO_L30N_0,0,I/O,TRUE,A,1,3
+A4,IO_L28N_0,0,I/O,TRUE,A,1,4
+A5,IO_L25N_0,0,I/O,TRUE,A,1,5
+A6,IO_L25P_0,0,I/O,TRUE,A,1,6
+A7,IO_L24N_0/VREF_0,0,VREF,TRUE,A,1,7
+A8,IO_L20P_0/GCLK10,0,GCLK,TRUE,A,1,8
+A9,IO_L18P_0/GCLK6,0,GCLK,TRUE,A,1,9
+A10,IP_0,0,INPUT,,A,1,10
+A11,IO_L15N_0,0,I/O,TRUE,A,1,11
+A12,IP_0,0,INPUT,,A,1,12
+A13,IO_L11P_0,0,I/O,TRUE,A,1,13
+A14,IO_L10P_0,0,I/O,TRUE,A,1,14
+A15,IP_0,0,INPUT,,A,1,15
+A16,IO_L06P_0/VREF_0,0,VREF,TRUE,A,1,16
+A17,IO_L06N_0,0,I/O,TRUE,A,1,17
+A18,IP_0,0,INPUT,,A,1,18
+A19,IO_L07N_0,0,I/O,TRUE,A,1,19
+A20,IO_0,0,I/O,,A,1,20
+A21,TCK,VCCAUX,JTAG,,A,1,21
+A22,GND,GND,GND,,A,1,22
+AA1,IP_L39N_3/VREF_3,3,VREF,TRUE,AA,21,1
+AA2,VCCAUX,VCCAUX,VCCAUX,,AA,21,2
+AA3,IO_L01P_2/M1,2,DUAL,TRUE,AA,21,3
+AA4,IO_L04N_2,2,I/O,TRUE,AA,21,4
+AA5,VCCO_2,2,VCCO,,AA,21,5
+AA6,IP_2,2,INPUT,,AA,21,6
+AA7,GND,GND,GND,,AA,21,7
+AA8,IO_L08N_2,2,I/O,TRUE,AA,21,8
+AA9,VCCO_2,2,VCCO,,AA,21,9
+AA10,IO_L12N_2/D6,2,DUAL,TRUE,AA,21,10
+AA11,GND,GND,GND,,AA,21,11
+AA12,IO_L16P_2/GCLK14,2,GCLK,TRUE,AA,21,12
+AA13,VCCO_2,2,VCCO,,AA,21,13
+AA14,IO_L18N_2/GCLK2,2,GCLK,TRUE,AA,21,14
+AA15,IO_L19P_2,2,I/O,TRUE,AA,21,15
+AA16,GND,GND,GND,,AA,21,16
+AA17,IO_L22P_2/AWAKE,2,PWRMGMT,TRUE,AA,21,17
+AA18,VCCO_2,2,VCCO,,AA,21,18
+AA19,IO_L27N_2,2,I/O,TRUE,AA,21,19
+AA20,IO_L30P_2,2,I/O,TRUE,AA,21,20
+AA21,VCCAUX,VCCAUX,VCCAUX,,AA,21,21
+AA22,IO_L02N_1/LDC0,1,DUAL,TRUE,AA,21,22
+AB1,GND,GND,GND,,AB,22,1
+AB2,IP_2/VREF_2,2,VREF,,AB,22,2
+AB3,IO_L01N_2/M0,2,DUAL,TRUE,AB,22,3
+AB4,IO_L04P_2,2,I/O,TRUE,AB,22,4
+AB5,IO_L05P_2,2,I/O,TRUE,AB,22,5
+AB6,IO_L05N_2,2,I/O,TRUE,AB,22,6
+AB7,IO_L08P_2,2,I/O,TRUE,AB,22,7
+AB8,IO_L09P_2/VS1,2,DUAL,TRUE,AB,22,8
+AB9,IO_L09N_2/VS0,2,DUAL,TRUE,AB,22,9
+AB10,IO_L12P_2/D7,2,DUAL,TRUE,AB,22,10
+AB11,IP_2/VREF_2,2,VREF,,AB,22,11
+AB12,IO_L16N_2/GCLK15,2,GCLK,TRUE,AB,22,12
+AB13,IO_L18P_2,2,GCLK,TRUE,AB,22,13
+AB14,IO_L19N_2,2,I/O,TRUE,AB,22,14
+AB15,IP_2,2,INPUT,,AB,22,15
+AB16,IO_L22N_2/DOUT,2,DUAL,TRUE,AB,22,16
+AB17,IO_L23P_2,2,I/O,TRUE,AB,22,17
+AB18,IO_L23N_2,2,I/O,TRUE,AB,22,18
+AB19,IO_L27P_2,2,I/O,TRUE,AB,22,19
+AB20,IO_L30N_2,2,I/O,TRUE,AB,22,20
+AB21,DONE,VCCAUX,CONFIG,,AB,22,21
+AB22,GND,GND,GND,,AB,22,22
+B1,TMS,VCCAUX,JTAG,,B,2,1
+B2,VCCAUX,VCCAUX,VCCAUX,,B,2,2
+B3,IO_L30P_0,0,I/O,TRUE,B,2,3
+B4,IO_L28P_0,0,I/O,TRUE,B,2,4
+B5,VCCO_0,0,VCCO,,B,2,5
+B6,IO_L24P_0,0,I/O,TRUE,B,2,6
+B7,GND,GND,GND,,B,2,7
+B8,IO_L20N_0/GCLK11,0,GCLK,TRUE,B,2,8
+B9,IO_L18N_0/GCLK7,0,GCLK,TRUE,B,2,9
+B10,VCCO_0,0,VCCO,,B,2,10
+B11,IO_L15P_0,0,I/O,TRUE,B,2,11
+B12,GND,GND,GND,,B,2,12
+B13,IO_L11N_0,0,I/O,TRUE,B,2,13
+B14,VCCO_0,0,VCCO,,B,2,14
+B15,IO_L10N_0,0,I/O,TRUE,B,2,15
+B16,GND,GND,GND,,B,2,16
+B17,IO_L03P_0,0,I/O,TRUE,B,2,17
+B18,VCCO_0,0,VCCO,,B,2,18
+B19,IO_L02N_0,0,I/O,TRUE,B,2,19
+B20,IO_L07P_0,0,I/O,TRUE,B,2,20
+B21,VCCAUX,VCCAUX,VCCAUX,,B,2,21
+B22,TDO,VCCAUX,JTAG,,B,2,22
+C1,IO_L02N_3,3,I/O,TRUE,C,3,1
+C2,IO_L02P_3,3,I/O,TRUE,C,3,2
+C3,GND,GND,GND,,C,3,3
+C4,IO_L29N_0,0,I/O,TRUE,C,3,4
+C5,IP_0,0,INPUT,,C,3,5
+C6,IO_L21P_0,0,I/O,TRUE,C,3,6
+C7,IO_L26P_0,0,I/O,TRUE,C,3,7
+C8,IO_L22P_0,0,I/O,TRUE,C,3,8
+C9,IO_L16P_0,0,I/O,TRUE,C,3,9
+C10,IP_0,0,INPUT,,C,3,10
+C11,IP_0/VREF_0,0,VREF,,C,3,11
+C12,IO_L14N_0,0,I/O,TRUE,C,3,12
+C13,IO_L14P_0,0,I/O,TRUE,C,3,13
+C14,IP_0,0,INPUT,,C,3,14
+C15,IO_L12N_0/VREF_0,0,VREF,TRUE,C,3,15
+C16,IO_L08N_0,0,I/O,TRUE,C,3,16
+C17,IO_L03N_0,0,I/O,TRUE,C,3,17
+C18,IO_L02P_0/VREF_0,0,VREF,TRUE,C,3,18
+C19,IO_L01N_0,0,I/O,TRUE,C,3,19
+C20,GND,GND,GND,,C,3,20
+C21,IP_L39N_1,1,INPUT,TRUE,C,3,21
+C22,IP_L39P_1/VREF_1,1,VREF,TRUE,C,3,22
+D1,IP_L04P_3,3,INPUT,TRUE,D,4,1
+D2,TDI,VCCAUX,JTAG,,D,4,2
+D3,IP_L08P_3,3,INPUT,TRUE,D,4,3
+D4,IP_L08N_3,3,INPUT,TRUE,D,4,4
+D5,IO_L29P_0,0,I/O,TRUE,D,4,5
+D6,IO_L21N_0,0,I/O,TRUE,D,4,6
+D7,IO_L26N_0,0,I/O,TRUE,D,4,7
+D8,GND,GND,GND,,D,4,8
+D9,IO_L22N_0,0,I/O,TRUE,D,4,9
+D10,IO_L16N_0,0,I/O,TRUE,D,4,10
+D11,GND,GND,GND,,D,4,11
+D12,VCCAUX,VCCAUX,VCCAUX,,D,4,12
+D13,IO_L09N_0,0,I/O,TRUE,D,4,13
+D14,IO_L12P_0,0,I/O,TRUE,D,4,14
+D15,IO_L08P_0,0,I/O,TRUE,D,4,15
+D16,GND,GND,GND,,D,4,16
+D17,IP_0,0,INPUT,,D,4,17
+D18,IP_0,0,INPUT,,D,4,18
+D19,IO_L01P_0,0,I/O,TRUE,D,4,19
+D20,IO_L36P_1/A20,1,DUAL,TRUE,D,4,20
+D21,IO_L37P_1/A22,1,DUAL,TRUE,D,4,21
+D22,IO_L37N_1/A23,1,DUAL,TRUE,D,4,22
+E1,IP_L04N_3/VREF_3,3,VREF,TRUE,E,5,1
+E2,VCCO_3,3,VCCO,,E,5,2
+E3,IO_L09P_3,3,I/O,TRUE,E,5,3
+E4,IO_L09N_3,3,I/O,TRUE,E,5,4
+E5,VCCAUX,VCCAUX,VCCAUX,,E,5,5
+E6,IP_0,0,INPUT,,E,5,6
+E7,IO_L31P_0/VREF_0,0,VREF,TRUE,E,5,7
+E8,IO_L27N_0,0,I/O,TRUE,E,5,8
+E9,VCCO_0,0,VCCO,,E,5,9
+E10,IP_0,0,INPUT,,E,5,10
+E11,IO_L19N_0/GCLK9,0,GCLK,TRUE,E,5,11
+E12,IO_L17P_0/GCLK4,0,GCLK,TRUE,E,5,12
+E13,IO_L09P_0,0,I/O,TRUE,E,5,13
+E14,VCCO_0,0,VCCO,,E,5,14
+E15,IO_L05P_0,0,I/O,TRUE,E,5,15
+E16,IO_L04P_0,0,I/O,TRUE,E,5,16
+E17,IP_0,0,INPUT,,E,5,17
+E18,VCCAUX,VCCAUX,VCCAUX,,E,5,18
+E19,IO_L36N_1/A21,1,DUAL,TRUE,E,5,19
+E20,IO_L35N_1,1,I/O,TRUE,E,5,20
+E21,VCCO_1,1,VCCO,,E,5,21
+E22,IO_L33N_1,1,I/O,TRUE,E,5,22
+F1,IO_L06N_3,3,I/O,TRUE,F,6,1
+F2,IO_L06P_3,3,I/O,TRUE,F,6,2
+F3,IO_L01P_3,3,I/O,TRUE,F,6,3
+F4,IO_L03P_3,3,I/O,TRUE,F,6,4
+F5,IO_L03N_3,3,I/O,TRUE,F,6,5
+F6,GND,GND,GND,,F,6,6
+F7,IO_L31N_0/PUDC_B,0,DUAL,TRUE,F,6,7
+F8,IO_L27P_0,0,I/O,TRUE,F,6,8
+F9,IO_L23N_0,0,I/O,TRUE,F,6,9
+F10,IO_L19P_0/GCLK8,0,GCLK,TRUE,F,6,10
+F11,IO_L17N_0/GCLK5,0,GCLK,TRUE,F,6,11
+F12,IP_0,0,INPUT,,F,6,12
+F13,IO_L13N_0,0,I/O,TRUE,F,6,13
+F14,IO_L13P_0,0,I/O,TRUE,F,6,14
+F15,IO_L05N_0,0,I/O,TRUE,F,6,15
+F16,IO_L04N_0,0,I/O,TRUE,F,6,16
+F17,GND,GND,GND,,F,6,17
+F18,IO_L38N_1/A25,1,DUAL,TRUE,F,6,18
+F19,IO_L38P_1/A24,1,DUAL,TRUE,F,6,19
+F20,IO_L30N_1/A19,1,DUAL,TRUE,F,6,20
+F21,IO_L35P_1,1,I/O,TRUE,F,6,21
+F22,IO_L33P_1,1,I/O,TRUE,F,6,22
+G1,IO_L11P_3,3,I/O,TRUE,G,7,1
+G2,GND,GND,GND,,G,7,2
+G3,IO_L01N_3,3,I/O,TRUE,G,7,3
+G4,GND,GND,GND,,G,7,4
+G5,IO_L07P_3,3,I/O,TRUE,G,7,5
+G6,IO_L07N_3,3,I/O,TRUE,G,7,6
+G7,VCCINT,VCCINT,VCCINT,,G,7,7
+G8,IO_L23P_0,0,I/O,TRUE,G,7,8
+G9,GND,GND,GND,,G,7,9
+G10,VCCAUX,VCCAUX,VCCAUX,,G,7,10
+G11,GND,GND,GND,,G,7,11
+G12,VCCAUX,VCCAUX,VCCAUX,,G,7,12
+G13,GND,GND,GND,,G,7,13
+G14,VCCAUX,VCCAUX,VCCAUX,,G,7,14
+G15,GND,GND,GND,,G,7,15
+G16,VCCINT,VCCINT,VCCINT,,G,7,16
+G17,IO_L34P_1,1,I/O,TRUE,G,7,17
+G18,IO_L34N_1,1,I/O,TRUE,G,7,18
+G19,IO_L30P_1/A18,1,DUAL,TRUE,G,7,19
+G20,IP_L31N_1,1,INPUT,TRUE,G,7,20
+G21,GND,GND,GND,,G,7,21
+G22,IO_L28N_1,1,I/O,TRUE,G,7,22
+H1,IO_L11N_3,3,I/O,TRUE,H,8,1
+H2,IO_L14P_3,3,I/O,TRUE,H,8,2
+H3,IO_L05P_3,3,I/O,TRUE,H,8,3
+H4,IO_L05N_3,3,I/O,TRUE,H,8,4
+H5,IO_L10P_3,3,I/O,TRUE,H,8,5
+H6,IO_L10N_3,3,I/O,TRUE,H,8,6
+H7,GND,GND,GND,,H,8,7
+H8,GND,GND,GND,,H,8,8
+H9,VCCINT,VCCINT,VCCINT,,H,8,9
+H10,GND,GND,GND,,H,8,10
+H11,VCCINT,VCCINT,VCCINT,,H,8,11
+H12,GND,GND,GND,,H,8,12
+H13,VCCINT,VCCINT,VCCINT,,H,8,13
+H14,GND,GND,GND,,H,8,14
+H15,VCCINT,VCCINT,VCCINT,,H,8,15
+H16,GND,GND,GND,,H,8,16
+H17,IO_L26P_1/A14,1,DUAL,TRUE,H,8,17
+H18,IO_L26N_1/A15,1,DUAL,TRUE,H,8,18
+H19,GND,GND,GND,,H,8,19
+H20,IO_L32N_1,1,I/O,TRUE,H,8,20
+H21,IP_L31P_1/VREF_1,1,VREF,TRUE,H,8,21
+H22,IO_L28P_1,1,I/O,TRUE,H,8,22
+J1,IO_L14N_3/VREF_3,3,VREF,TRUE,J,9,1
+J2,VCCO_3,3,VCCO,,J,9,2
+J3,IP_L16P_3,3,INPUT,TRUE,J,9,3
+J4,IP_L16N_3,3,INPUT,TRUE,J,9,4
+J5,VCCO_3,3,VCCO,,J,9,5
+J6,IP_L12P_3,3,INPUT,TRUE,J,9,6
+J7,IP_L12N_3/VREF_3,3,VREF,TRUE,J,9,7
+J8,VCCINT,VCCINT,VCCINT,,J,9,8
+J9,GND,GND,GND,,J,9,9
+J10,VCCINT,VCCINT,VCCINT,,J,9,10
+J11,GND,GND,GND,,J,9,11
+J12,VCCINT,VCCINT,VCCINT,,J,9,12
+J13,GND,GND,GND,,J,9,13
+J14,VCCINT,VCCINT,VCCINT,,J,9,14
+J15,GND,GND,GND,,J,9,15
+J16,VCCAUX,VCCAUX,VCCAUX,,J,9,16
+J17,IO_L29N_1/A17,1,DUAL,TRUE,J,9,17
+J18,VCCO_1,1,VCCO,,J,9,18
+J19,IO_L32P_1,1,I/O,TRUE,J,9,19
+J20,IO_L25N_1/A13,1,DUAL,TRUE,J,9,20
+J21,IP_L27P_1,1,INPUT,TRUE,J,9,21
+J22,IP_L27N_1,1,INPUT,TRUE,J,9,22
+K1,IO_L19P_3/LHCLK2,3,LHCLK,TRUE,K,10,1
+K2,IO_L17P_3,3,I/O,TRUE,K,10,2
+K3,IO_L17N_3,3,I/O,TRUE,K,10,3
+K4,IO_L13P_3,3,I/O,TRUE,K,10,4
+K5,IO_L13N_3,3,I/O,TRUE,K,10,5
+K6,IO_L15P_3,3,I/O,TRUE,K,10,6
+K7,VCCAUX,VCCAUX,VCCAUX,,K,10,7
+K8,GND,GND,GND,,K,10,8
+K9,VCCINT,VCCINT,VCCINT,,K,10,9
+K10,GND,GND,GND,,K,10,10
+K11,VCCINT,VCCINT,VCCINT,,K,10,11
+K12,GND,GND,GND,,K,10,12
+K13,VCCINT,VCCINT,VCCINT,,K,10,13
+K14,GND,GND,GND,,K,10,14
+K15,VCCINT,VCCINT,VCCINT,,K,10,15
+K16,IO_L29P_1/A16,1,DUAL,TRUE,K,10,16
+K17,IP_L23N_1,1,INPUT,TRUE,K,10,17
+K18,IO_L24N_1,1,I/O,TRUE,K,10,18
+K19,IO_L24P_1,1,I/O,TRUE,K,10,19
+K20,IO_L25P_1/A12,1,DUAL,TRUE,K,10,20
+K21,VCCO_1,1,VCCO,,K,10,21
+K22,IO_L22N_1/A11,1,DUAL,TRUE,K,10,22
+L1,IO_L19N_3/IRDY2/LHCLK3,3,LHCLK,TRUE,L,11,1
+L2,GND,GND,GND,,L,11,2
+L3,IO_L20P_3/LHCLK4,3,LHCLK,TRUE,L,11,3
+L4,VCCAUX,VCCAUX,VCCAUX,,L,11,4
+L5,IO_L15N_3,3,I/O,TRUE,L,11,5
+L6,IO_L18P_3/LHCLK0,3,LHCLK,TRUE,L,11,6
+L7,GND,GND,GND,,L,11,7
+L8,VCCINT,VCCINT,VCCINT,,L,11,8
+L9,GND,GND,GND,,L,11,9
+L10,VCCINT,VCCINT,VCCINT,,L,11,10
+L11,GND,GND,GND,,L,11,11
+L12,VCCINT,VCCINT,VCCINT,,L,11,12
+L13,GND,GND,GND,,L,11,13
+L14,VCCINT,VCCINT,VCCINT,,L,11,14
+L15,GND,GND,GND,,L,11,15
+L16,VCCAUX,VCCAUX,VCCAUX,,L,11,16
+L17,IO_L21N_1/RHCLK7,1,RHCLK,TRUE,L,11,17
+L18,IP_L23P_1/VREF_1,1,VREF,TRUE,L,11,18
+L19,GND,GND,GND,,L,11,19
+L20,IO_L20N_1/RHCLK5,1,RHCLK,TRUE,L,11,20
+L21,IO_L20P_1/RHCLK4,1,RHCLK,TRUE,L,11,21
+L22,IO_L22P_1/A10,1,DUAL,TRUE,L,11,22
+M1,IO_L22P_3/VREF_3,3,VREF,TRUE,M,12,1
+M2,IO_L20N_3/LHCLK5,3,LHCLK,TRUE,M,12,2
+M3,IP_L23P_3,3,INPUT,TRUE,M,12,3
+M4,GND,GND,GND,,M,12,4
+M5,IO_L18N_3/LHCLK1,3,LHCLK,TRUE,M,12,5
+M6,IO_L21P_3/TRDY2/LHCLK6,3,LHCLK,TRUE,M,12,6
+M7,VCCAUX,VCCAUX,VCCAUX,,M,12,7
+M8,GND,GND,GND,,M,12,8
+M9,VCCINT,VCCINT,VCCINT,,M,12,9
+M10,GND,GND,GND,,M,12,10
+M11,VCCINT,VCCINT,VCCINT,,M,12,11
+M12,GND,GND,GND,,M,12,12
+M13,VCCINT,VCCINT,VCCINT,,M,12,13
+M14,GND,GND,GND,,M,12,14
+M15,VCCINT,VCCINT,VCCINT,,M,12,15
+M16,GND,GND,GND,,M,12,16
+M17,IO_L18N_1/RHCLK1,1,RHCLK,TRUE,M,12,17
+M18,IO_L21P_1/IRDY1/RHCLK6,1,RHCLK,TRUE,M,12,18
+M19,VCCAUX,VCCAUX,VCCAUX,,M,12,19
+M20,IO_L19N_1/TRDY1/RHCLK3,1,RHCLK,TRUE,M,12,20
+M21,GND,GND,GND,,M,12,21
+M22,IO_L17N_1/A9,1,DUAL,TRUE,M,12,22
+N1,IO_L22N_3,3,I/O,TRUE,N,13,1
+N2,VCCO_3,3,VCCO,,N,13,2
+N3,IP_L31P_3,3,INPUT,TRUE,N,13,3
+N4,IP_L23N_3,3,INPUT,TRUE,N,13,4
+N5,IO_L24N_3,3,I/O,TRUE,N,13,5
+N6,IO_L24P_3,3,I/O,TRUE,N,13,6
+N7,IO_L21N_3/LHCLK7,3,LHCLK,TRUE,N,13,7
+N8,VCCINT,VCCINT,VCCINT,,N,13,8
+N9,GND,GND,GND,,N,13,9
+N10,VCCINT,VCCINT,VCCINT,,N,13,10
+N11,GND,GND,GND,,N,13,11
+N12,VCCINT,VCCINT,VCCINT,,N,13,12
+N13,GND,GND,GND,,N,13,13
+N14,VCCINT,VCCINT,VCCINT,,N,13,14
+N15,GND,GND,GND,,N,13,15
+N16,VCCAUX,VCCAUX,VCCAUX,,N,13,16
+N17,IO_L13P_1/A2,1,DUAL,TRUE,N,13,17
+N18,IO_L18P_1/RHCLK0,1,RHCLK,TRUE,N,13,18
+N19,IO_L15N_1/A7,1,DUAL,TRUE,N,13,19
+N20,IO_L15P_1/A6,1,DUAL,TRUE,N,13,20
+N21,IO_L19P_1/RHCLK2,1,RHCLK,TRUE,N,13,21
+N22,IO_L17P_1/A8,1,DUAL,TRUE,N,13,22
+P1,IO_L25P_3,3,I/O,TRUE,P,14,1
+P2,IO_L25N_3,3,I/O,TRUE,P,14,2
+P3,IP_L31N_3,3,INPUT,TRUE,P,14,3
+P4,IO_L32P_3/VREF_3,3,VREF,TRUE,P,14,4
+P5,VCCO_3,3,VCCO,,P,14,5
+P6,IO_L26P_3,3,I/O,TRUE,P,14,6
+P7,VCCAUX,VCCAUX,VCCAUX,,P,14,7
+P8,GND,GND,GND,,P,14,8
+P9,VCCINT,VCCINT,VCCINT,,P,14,9
+P10,GND,GND,GND,,P,14,10
+P11,VCCINT,VCCINT,VCCINT,,P,14,11
+P12,GND,GND,GND,,P,14,12
+P13,VCCINT,VCCINT,VCCINT,,P,14,13
+P14,GND,GND,GND,,P,14,14
+P15,VCCINT,VCCINT,VCCINT,,P,14,15
+P16,IO_L13N_1/A3,1,DUAL,TRUE,P,14,16
+P17,IP_L12N_1/VREF_1,1,VREF,TRUE,P,14,17
+P18,VCCO_1,1,VCCO,,P,14,18
+P19,IO_L10P_1,1,I/O,TRUE,P,14,19
+P20,IP_L16N_1,1,INPUT,TRUE,P,14,20
+P21,VCCO_1,1,VCCO,,P,14,21
+P22,IO_L14N_1/A5,1,DUAL,TRUE,P,14,22
+R1,IO_L28N_3,3,I/O,TRUE,R,15,1
+R2,IO_L28P_3,3,I/O,TRUE,R,15,2
+R3,IO_L34P_3,3,I/O,TRUE,R,15,3
+R4,GND,GND,GND,,R,15,4
+R5,IO_L32N_3,3,I/O,TRUE,R,15,5
+R6,IO_L26N_3,3,I/O,TRUE,R,15,6
+R7,GND,GND,GND,,R,15,7
+R8,VCCINT,VCCINT,VCCINT,,R,15,8
+R9,GND,GND,GND,,R,15,9
+R10,VCCINT,VCCINT,VCCINT,,R,15,10
+R11,GND,GND,GND,,R,15,11
+R12,VCCINT,VCCINT,VCCINT,,R,15,12
+R13,GND,GND,GND,,R,15,13
+R14,VCCINT,VCCINT,VCCINT,,R,15,14
+R15,GND,GND,GND,,R,15,15
+R16,GND,GND,GND,,R,15,16
+R17,IP_L12P_1,1,INPUT,TRUE,R,15,17
+R18,IO_L10N_1,1,I/O,TRUE,R,15,18
+R19,IO_L07P_1,1,I/O,TRUE,R,15,19
+R20,IO_L07N_1,1,I/O,TRUE,R,15,20
+R21,IP_L16P_1/VREF_1,1,VREF,TRUE,R,15,21
+R22,IO_L14P_1/A4,1,DUAL,TRUE,R,15,22
+T1,IO_L30P_3,3,I/O,TRUE,T,16,1
+T2,GND,GND,GND,,T,16,2
+T3,IP_L27P_3,3,INPUT,TRUE,T,16,3
+T4,IO_L34N_3,3,I/O,TRUE,T,16,4
+T5,IO_L29N_3,3,I/O,TRUE,T,16,5
+T6,IO_L29P_3,3,I/O,TRUE,T,16,6
+T7,VCCINT,VCCINT,VCCINT,,T,16,7
+T8,GND,GND,GND,,T,16,8
+T9,VCCAUX,VCCAUX,VCCAUX,,T,16,9
+T10,GND,GND,GND,,T,16,10
+T11,VCCAUX,VCCAUX,VCCAUX,,T,16,11
+T12,GND,GND,GND,,T,16,12
+T13,VCCAUX,VCCAUX,VCCAUX,,T,16,13
+T14,GND,GND,GND,,T,16,14
+T15,GND,GND,GND,,T,16,15
+T16,VCCINT,VCCINT,VCCINT,,T,16,16
+T17,IO_L05N_1,1,I/O,TRUE,T,16,17
+T18,IO_L05P_1,1,I/O,TRUE,T,16,18
+T19,GND,GND,GND,,T,16,19
+T20,IO_L09N_1,1,I/O,TRUE,T,16,20
+T21,GND,GND,GND,,T,16,21
+T22,IO_L11N_1/VREF_1,1,VREF,TRUE,T,16,22
+U1,IO_L30N_3,3,I/O,TRUE,U,17,1
+U2,IO_L33P_3,3,I/O,TRUE,U,17,2
+U3,IP_L27N_3,3,INPUT,TRUE,U,17,3
+U4,IO_L38P_3,3,I/O,TRUE,U,17,4
+U5,IO_L38N_3,3,I/O,TRUE,U,17,5
+U6,GND,GND,GND,,U,17,6
+U7,IO_L02N_2/CSO_B,2,DUAL,TRUE,U,17,7
+U8,IO_L11N_2,2,I/O,TRUE,U,17,8
+U9,IO_L10N_2,2,I/O,TRUE,U,17,9
+U10,IO_L14N_2/D4,2,DUAL,TRUE,U,17,10
+U11,GND,GND,GND,,U,17,11
+U12,IO_L17P_2/GCLK0,2,GCLK,TRUE,U,17,12
+U13,IO_L20P_2,2,I/O,TRUE,U,17,13
+U14,IO_L25P_2,2,I/O,TRUE,U,17,14
+U15,IO_L25N_2,2,I/O,TRUE,U,17,15
+U16,IO_L28P_2,2,I/O,TRUE,U,17,16
+U17,GND,GND,GND,,U,17,17
+U18,IO_L01P_1/HDC,1,DUAL,TRUE,U,17,18
+U19,IO_L01N_1/LDC2,1,DUAL,TRUE,U,17,19
+U20,IO_L09P_1,1,I/O,TRUE,U,17,20
+U21,IP_L08N_1/VREF_1,1,VREF,TRUE,U,17,21
+U22,IO_L11P_1,1,I/O,TRUE,U,17,22
+V1,IO_L33N_3,3,I/O,TRUE,V,18,1
+V2,VCCO_3,3,VCCO,,V,18,2
+V3,IO_L36N_3,3,I/O,TRUE,V,18,3
+V4,IO_L36P_3,3,I/O,TRUE,V,18,4
+V5,VCCAUX,VCCAUX,VCCAUX,,V,18,5
+V6,IO_L02P_2/M2,2,DUAL,TRUE,V,18,6
+V7,IO_L11P_2,2,I/O,TRUE,V,18,7
+V8,IO_L06N_2,2,I/O,TRUE,V,18,8
+V9,VCCO_2,2,VCCO,,V,18,9
+V10,IO_L10P_2,2,I/O,TRUE,V,18,10
+V11,IO_L14P_2/D5,2,DUAL,TRUE,V,18,11
+V12,IO_L17N_2/GCLK1,2,GCLK,TRUE,V,18,12
+V13,IO_L20N_2/MOSI/CSI_B,2,DUAL,TRUE,V,18,13
+V14,VCCO_2,2,VCCO,,V,18,14
+V15,IP_2/VREF_2,2,VREF,,V,18,15
+V16,IO_L28N_2,2,I/O,TRUE,V,18,16
+V17,IO_L31N_2/CCLK,2,DUAL,TRUE,V,18,17
+V18,VCCAUX,VCCAUX,VCCAUX,,V,18,18
+V19,SUSPEND,1,PWRMGMT,,V,18,19
+V20,IO_L03N_1/A1,1,DUAL,TRUE,V,18,20
+V21,VCCO_1,1,VCCO,,V,18,21
+V22,IP_L08P_1,1,INPUT,TRUE,V,18,22
+W1,IO_L35N_3,3,I/O,TRUE,W,19,1
+W2,IO_L37N_3,3,I/O,TRUE,W,19,2
+W3,IO_L37P_3,3,I/O,TRUE,W,19,3
+W4,IP_2/VREF_2,2,VREF,,W,19,4
+W5,IO_L03P_2,2,I/O,TRUE,W,19,5
+W6,IO_L07N_2/VS2,2,DUAL,TRUE,W,19,6
+W7,GND,GND,GND,,W,19,7
+W8,IO_L06P_2,2,I/O,TRUE,W,19,8
+W9,IP_2/VREF_2,2,VREF,,W,19,9
+W10,IP_2,2,INPUT,,W,19,10
+W11,VCCAUX,VCCAUX,VCCAUX,,W,19,11
+W12,GND,GND,GND,,W,19,12
+W13,IP_2/VREF_2,2,VREF,,W,19,13
+W14,IO_L21N_2,2,I/O,TRUE,W,19,14
+W15,IO_L24P_2/INIT_B,2,DUAL,TRUE,W,19,15
+W16,GND,GND,GND,,W,19,16
+W17,IO_L31P_2/D0/DIN/MISO,2,DUAL,TRUE,W,19,17
+W18,IP_2/VREF_2,2,VREF,,W,19,18
+W19,IO_L03P_1/A0,1,DUAL,TRUE,W,19,19
+W20,IP_L04N_1/VREF_1,1,VREF,TRUE,W,19,20
+W21,IP_L04P_1,1,INPUT,TRUE,W,19,21
+W22,IO_L06P_1,1,I/O,TRUE,W,19,22
+Y1,IO_L35P_3,3,I/O,TRUE,Y,20,1
+Y2,IP_L39P_3,3,INPUT,TRUE,Y,20,2
+Y3,GND,GND,GND,,Y,20,3
+Y4,IO_L03N_2,2,I/O,TRUE,Y,20,4
+Y5,IO_L07P_2/RDWR_B,2,DUAL,TRUE,Y,20,5
+Y6,IP_2,2,INPUT,,Y,20,6
+Y7,IP_2,2,INPUT,,Y,20,7
+Y8,IO_L13P_2,2,I/O,TRUE,Y,20,8
+Y9,IO_L13N_2,2,I/O,TRUE,Y,20,9
+Y10,IO_L15N_2/GCLK13,2,GCLK,TRUE,Y,20,10
+Y11,IO_L15P_2/GCLK12,2,GCLK,TRUE,Y,20,11
+Y12,IP_2,2,INPUT,,Y,20,12
+Y13,IO_L21P_2,2,I/O,TRUE,Y,20,13
+Y14,IP_2/VREF_2,2,VREF,,Y,20,14
+Y15,IO_L24N_2/D3,2,DUAL,TRUE,Y,20,15
+Y16,IO_L29N_2,2,I/O,TRUE,Y,20,16
+Y17,IO_L29P_2,2,I/O,TRUE,Y,20,17
+Y18,IO_L26P_2/D2,2,DUAL,TRUE,Y,20,18
+Y19,IO_L26N_2/D1,2,DUAL,TRUE,Y,20,19
+Y20,GND,GND,GND,,Y,20,20
+Y21,IO_L02P_1/LDC1,1,DUAL,TRUE,Y,20,21
+Y22,IO_L06N_1,1,I/O,TRUE,Y,20,22

Copied: usrp-hw/trunk/sym/xilinx/XC3SD1800AFG676.csv (from rev 10171, 
usrp-hw/trunk/sym/generated/XC3SD1800AFG676.csv)
===================================================================
--- usrp-hw/trunk/sym/xilinx/XC3SD1800AFG676.csv                                
(rev 0)
+++ usrp-hw/trunk/sym/xilinx/XC3SD1800AFG676.csv        2009-01-12 22:39:36 UTC 
(rev 10209)
@@ -0,0 +1,677 @@
+PIN,XC3SD1800AFG676_PIN,XC3SD1800AFG676_BANK,TYPE,DIFF_PAIR,ROW,ROW_#,COLUMN
+A1,GND,GND,GND,,A,1,1
+A2,PROG_B,VCCAUX,CONFIG,,A,1,2
+A3,IO_L51P_0,0,I/O,TRUE,A,1,3
+A4,IO_L45P_0,0,I/O,TRUE,A,1,4
+A5,IP_0,0,INPUT,,A,1,5
+A6,GND,GND,GND,,A,1,6
+A7,IP_0,0,INPUT,,A,1,7
+A8,IO_L38P_0,0,I/O,TRUE,A,1,8
+A9,IO_L36P_0,0,I/O,TRUE,A,1,9
+A10,IO_L33P_0,0,I/O,TRUE,A,1,10
+A11,GND,GND,GND,,A,1,11
+A12,IO_L29P_0,0,I/O,TRUE,A,1,12
+A13,IP_0,0,INPUT,,A,1,13
+A14,IO_L26N_0/GCLK7,0,GCLK,TRUE,A,1,14
+A15,IO_L23N_0,0,I/O,TRUE,A,1,15
+A16,GND,GND,GND,,A,1,16
+A17,IP_0,0,INPUT,,A,1,17
+A18,IO_L18N_0,0,I/O,TRUE,A,1,18
+A19,IO_L15N_0,0,I/O,TRUE,A,1,19
+A20,IO_L14N_0,0,I/O,TRUE,A,1,20
+A21,GND,GND,GND,,A,1,21
+A22,IO_L07N_0,0,I/O,TRUE,A,1,22
+A23,IP_0,0,INPUT,,A,1,23
+A24,IP_0,0,INPUT,,A,1,24
+A25,TCK,VCCAUX,JTAG,,A,1,25
+A26,GND,GND,GND,,A,1,26
+AA1,GND,GND,GND,,AA,21,1
+AA2,IO_L55P_3,3,I/O,TRUE,AA,21,2
+AA3,IO_L55N_3,3,I/O,TRUE,AA,21,3
+AA4,IP_L58P_3,3,INPUT,TRUE,AA,21,4
+AA5,IP_L58N_3/VREF_3,3,VREF,TRUE,AA,21,5
+AA6,GND,GND,GND,,AA,21,6
+AA7,IO_L02N_2/CSO_B,2,DUAL,TRUE,AA,21,7
+AA8,IP_2,2,INPUT,,AA,21,8
+AA9,IP_2/VREF_2,2,VREF,,AA,21,9
+AA10,IO_L12N_2,2,I/O,TRUE,AA,21,10
+AA11,GND,GND,GND,,AA,21,11
+AA12,IO_L17N_2/VS2,2,DUAL,TRUE,AA,21,12
+AA13,IO_L25P_2/GCLK12,2,GCLK,TRUE,AA,21,13
+AA14,IO_L27N_2/GCLK1,2,GCLK,TRUE,AA,21,14
+AA15,IO_L34P_2/INIT_B,2,DUAL,TRUE,AA,21,15
+AA16,GND,GND,GND,,AA,21,16
+AA17,IO_L43P_2,2,I/O,TRUE,AA,21,17
+AA18,IO_L47N_2,2,I/O,TRUE,AA,21,18
+AA19,IP_2,2,INPUT,,AA,21,19
+AA20,IP_2/VREF_2,2,VREF,,AA,21,20
+AA21,GND,GND,GND,,AA,21,21
+AA22,IO_L09P_1,1,I/O,TRUE,AA,21,22
+AA23,IO_L09N_1,1,I/O,TRUE,AA,21,23
+AA24,IO_L11P_1,1,I/O,TRUE,AA,21,24
+AA25,IO_L11N_1,1,I/O,TRUE,AA,21,25
+AA26,GND,GND,GND,,AA,21,26
+AB1,IO_L60P_3,3,I/O,TRUE,AB,22,1
+AB2,VCCO_3,3,VCCO,,AB,22,2
+AB3,IP_L62P_3,3,INPUT,TRUE,AB,22,3
+AB4,IP_L62N_3,3,INPUT,TRUE,AB,22,4
+AB5,VCCAUX,VCCAUX,VCCAUX,,AB,22,5
+AB6,IP_2/VREF_2,2,VREF,,AB,22,6
+AB7,IO_L14N_2,2,I/O,TRUE,AB,22,7
+AB8,VCCO_2,2,VCCO,,AB,22,8
+AB9,IO_L15P_2,2,I/O,TRUE,AB,22,9
+AB10,IP_2/VREF_2,2,VREF,,AB,22,10
+AB11,VCCAUX,VCCAUX,VCCAUX,,AB,22,11
+AB12,IO_L21P_2,2,I/O,TRUE,AB,22,12
+AB13,IP_2,2,INPUT,,AB,22,13
+AB14,VCCO_2,2,VCCO,,AB,22,14
+AB15,IO_L30N_2/MOSI/CSI_B,2,DUAL,TRUE,AB,22,15
+AB16,IO_L38N_2,2,I/O,TRUE,AB,22,16
+AB17,IP_2,2,INPUT,,AB,22,17
+AB18,IO_L47P_2,2,I/O,TRUE,AB,22,18
+AB19,VCCO_2,2,VCCO,,AB,22,19
+AB20,IP_2,2,INPUT,,AB,22,20
+AB21,DONE,VCCAUX,CONFIG,,AB,22,21
+AB22,VCCAUX,VCCAUX,VCCAUX,,AB,22,22
+AB23,IO_L07P_1,1,I/O,TRUE,AB,22,23
+AB24,IO_L07N_1/VREF_1,1,VREF,TRUE,AB,22,24
+AB25,VCCO_1,1,VCCO,,AB,22,25
+AB26,IO_L06N_1,1,I/O,TRUE,AB,22,26
+AC1,IO_L60N_3,3,I/O,TRUE,AC,23,1
+AC2,IO_L64P_3,3,I/O,TRUE,AC,23,2
+AC3,IO_L64N_3,3,I/O,TRUE,AC,23,3
+AC4,IO_L01P_2/M1,2,DUAL,TRUE,AC,23,4
+AC5,IP_2,2,INPUT,,AC,23,5
+AC6,IO_L08P_2,2,I/O,TRUE,AC,23,6
+AC7,IP_2,2,INPUT,,AC,23,7
+AC8,IO_L14P_2,2,I/O,TRUE,AC,23,8
+AC9,IO_L15N_2,2,I/O,TRUE,AC,23,9
+AC10,IP_2/VREF_2,2,VREF,,AC,23,10
+AC11,IO_L23N_2,2,I/O,TRUE,AC,23,11
+AC12,IO_L21N_2,2,I/O,TRUE,AC,23,12
+AC13,IP_2,2,INPUT,,AC,23,13
+AC14,IO_L29N_2,2,I/O,TRUE,AC,23,14
+AC15,IO_L30P_2,2,I/O,TRUE,AC,23,15
+AC16,IO_L38P_2,2,I/O,TRUE,AC,23,16
+AC17,IP_2,2,INPUT,,AC,23,17
+AC18,IP_2,2,INPUT,,AC,23,18
+AC19,IO_L40N_2,2,I/O,TRUE,AC,23,19
+AC20,IO_L41N_2,2,I/O,TRUE,AC,23,20
+AC21,IO_L45N_2,2,I/O,TRUE,AC,23,21
+AC22,IO_2,2,I/O,,AC,23,22
+AC23,IO_L03P_1/A0,1,DUAL,TRUE,AC,23,23
+AC24,IO_L03N_1/A1,1,DUAL,TRUE,AC,23,24
+AC25,IO_L05N_1,1,I/O,TRUE,AC,23,25
+AC26,IO_L06P_1,1,I/O,TRUE,AC,23,26
+AD1,IO_L65P_3,3,I/O,TRUE,AD,24,1
+AD2,IO_L65N_3,3,I/O,TRUE,AD,24,2
+AD3,GND,GND,GND,,AD,24,3
+AD4,IO_L01N_2/M0,2,DUAL,TRUE,AD,24,4
+AD5,IP_2,2,INPUT,,AD,24,5
+AD6,IO_L08N_2,2,I/O,TRUE,AD,24,6
+AD7,IO_L11P_2,2,I/O,TRUE,AD,24,7
+AD8,GND,GND,GND,,AD,24,8
+AD9,IP_2,2,INPUT,,AD,24,9
+AD10,IP_2,2,INPUT,,AD,24,10
+AD11,IO_L23P_2,2,I/O,TRUE,AD,24,11
+AD12,IP_2/VREF_2,2,VREF,,AD,24,12
+AD13,GND,GND,GND,,AD,24,13
+AD14,IO_L29P_2,2,I/O,TRUE,AD,24,14
+AD15,IO_L32P_2/AWAKE,2,PWRMGMT,TRUE,AD,24,15
+AD16,IP_2,2,INPUT,,AD,24,16
+AD17,IO_L33N_2,2,I/O,TRUE,AD,24,17
+AD18,GND,GND,GND,,AD,24,18
+AD19,IO_L40P_2,2,I/O,TRUE,AD,24,19
+AD20,IO_L41P_2,2,I/O,TRUE,AD,24,20
+AD21,IO_L44N_2,2,I/O,TRUE,AD,24,21
+AD22,IO_L45P_2,2,I/O,TRUE,AD,24,22
+AD23,IP_2,2,INPUT,,AD,24,23
+AD24,GND,GND,GND,,AD,24,24
+AD25,IO_L02N_1/LDC0,1,DUAL,TRUE,AD,24,25
+AD26,IO_L05P_1,1,I/O,TRUE,AD,24,26
+AE1,IP_L66P_3,3,INPUT,TRUE,AE,25,1
+AE2,IP_L66N_3/VREF_3,3,VREF,TRUE,AE,25,2
+AE3,IO_L06P_2,2,I/O,TRUE,AE,25,3
+AE4,IO_L07P_2,2,I/O,TRUE,AE,25,4
+AE5,VCCO_2,2,VCCO,,AE,25,5
+AE6,IO_L10N_2,2,I/O,TRUE,AE,25,6
+AE7,IO_L11N_2,2,I/O,TRUE,AE,25,7
+AE8,IO_L18P_2,2,I/O,TRUE,AE,25,8
+AE9,IO_L19P_2/VS1,2,DUAL,TRUE,AE,25,9
+AE10,IO_L22P_2/D7,2,DUAL,TRUE,AE,25,10
+AE11,VCCO_2,2,VCCO,,AE,25,11
+AE12,IO_L24N_2/D4,2,DUAL,TRUE,AE,25,12
+AE13,IO_L26N_2/GCLK15,2,GCLK,TRUE,AE,25,13
+AE14,IO_L28N_2/GCLK3,2,GCLK,TRUE,AE,25,14
+AE15,IO_L32N_2/DOUT,2,DUAL,TRUE,AE,25,15
+AE16,VCCO_2,2,VCCO,,AE,25,16
+AE17,IO_L33P_2,2,I/O,TRUE,AE,25,17
+AE18,IO_L36N_2/D1,2,DUAL,TRUE,AE,25,18
+AE19,IO_L37N_2,2,I/O,TRUE,AE,25,19
+AE20,IO_L39N_2,2,I/O,TRUE,AE,25,20
+AE21,IO_L44P_2,2,I/O,TRUE,AE,25,21
+AE22,VCCO_2,2,VCCO,,AE,25,22
+AE23,IO_L48N_2,2,I/O,TRUE,AE,25,23
+AE24,IO_L52N_2/CCLK,2,DUAL,TRUE,AE,25,24
+AE25,IO_L51N_2,2,I/O,TRUE,AE,25,25
+AE26,IO_L02P_1/LDC1,1,DUAL,TRUE,AE,25,26
+AF1,GND,GND,GND,,AF,26,1
+AF2,IP_2,2,INPUT,,AF,26,2
+AF3,IO_L06N_2,2,I/O,TRUE,AF,26,3
+AF4,IO_L07N_2,2,I/O,TRUE,AF,26,4
+AF5,IO_L10P_2,2,I/O,TRUE,AF,26,5
+AF6,GND,GND,GND,,AF,26,6
+AF7,IP_2,2,INPUT,,AF,26,7
+AF8,IO_L18N_2,2,I/O,TRUE,AF,26,8
+AF9,IO_L19N_2/VS0,2,DUAL,TRUE,AF,26,9
+AF10,IO_L22N_2/D6,2,DUAL,TRUE,AF,26,10
+AF11,GND,GND,GND,,AF,26,11
+AF12,IO_L24P_2/D5,2,DUAL,TRUE,AF,26,12
+AF13,IO_L26P_2/GCLK14,2,GCLK,TRUE,AF,26,13
+AF14,IO_L28P_2/GCLK2,2,GCLK,TRUE,AF,26,14
+AF15,IP_2/VREF_2,2,VREF,,AF,26,15
+AF16,GND,GND,GND,,AF,26,16
+AF17,IP_2/VREF_2,2,VREF,,AF,26,17
+AF18,IO_L36P_2/D2,2,DUAL,TRUE,AF,26,18
+AF19,IO_L37P_2,2,I/O,TRUE,AF,26,19
+AF20,IO_L39P_2,2,I/O,TRUE,AF,26,20
+AF21,GND,GND,GND,,AF,26,21
+AF22,IP_2/VREF_2,2,VREF,,AF,26,22
+AF23,IO_L48P_2,2,I/O,TRUE,AF,26,23
+AF24,IO_L52P_2/D0/DIN/MISO,2,DUAL,TRUE,AF,26,24
+AF25,IO_L51P_2,2,I/O,TRUE,AF,26,25
+AF26,GND,GND,GND,,AF,26,26
+B1,IO_L02N_3,3,I/O,TRUE,B,2,1
+B2,IO_L02P_3,3,I/O,TRUE,B,2,2
+B3,IO_L51N_0,0,I/O,TRUE,B,2,3
+B4,IO_L45N_0,0,I/O,TRUE,B,2,4
+B5,VCCO_0,0,VCCO,,B,2,5
+B6,IO_L41P_0,0,I/O,TRUE,B,2,6
+B7,IO_L42P_0,0,I/O,TRUE,B,2,7
+B8,IO_L38N_0,0,I/O,TRUE,B,2,8
+B9,IO_L36N_0,0,I/O,TRUE,B,2,9
+B10,IO_L33N_0,0,I/O,TRUE,B,2,10
+B11,VCCO_0,0,VCCO,,B,2,11
+B12,IO_L29N_0,0,I/O,TRUE,B,2,12
+B13,IO_L28P_0/GCLK10,0,GCLK,TRUE,B,2,13
+B14,IO_L26P_0/GCLK6,0,GCLK,TRUE,B,2,14
+B15,IO_L23P_0,0,I/O,TRUE,B,2,15
+B16,VCCO_0,0,VCCO,,B,2,16
+B17,IO_L19N_0,0,I/O,TRUE,B,2,17
+B18,IO_L18P_0,0,I/O,TRUE,B,2,18
+B19,IO_L15P_0,0,I/O,TRUE,B,2,19
+B20,IO_L14P_0/VREF_0,0,VREF,TRUE,B,2,20
+B21,IO_L09N_0,0,I/O,TRUE,B,2,21
+B22,VCCO_0,0,VCCO,,B,2,22
+B23,IO_L07P_0,0,I/O,TRUE,B,2,23
+B24,IP_0,0,INPUT,,B,2,24
+B25,IP_L65N_1,1,INPUT,TRUE,B,2,25
+B26,IP_L65P_1/VREF_1,1,VREF,TRUE,B,2,26
+C1,IP_L04N_3/VREF_3,3,VREF,TRUE,C,3,1
+C2,IP_L04P_3,3,INPUT,TRUE,C,3,2
+C3,GND,GND,GND,,C,3,3
+C4,IP_0,0,INPUT,,C,3,4
+C5,IO_L44P_0,0,I/O,TRUE,C,3,5
+C6,IO_L41N_0,0,I/O,TRUE,C,3,6
+C7,IO_L42N_0,0,I/O,TRUE,C,3,7
+C8,IO_L40P_0,0,I/O,TRUE,C,3,8
+C9,GND,GND,GND,,C,3,9
+C10,IO_L34P_0,0,I/O,TRUE,C,3,10
+C11,IO_L32P_0,0,I/O,TRUE,C,3,11
+C12,IO_L30N_0,0,I/O,TRUE,C,3,12
+C13,IO_L28N_0/GCLK11,0,GCLK,TRUE,C,3,13
+C14,GND,GND,GND,,C,3,14
+C15,IO_L22N_0,0,I/O,TRUE,C,3,15
+C16,IO_L21N_0,0,I/O,TRUE,C,3,16
+C17,IO_L19P_0,0,I/O,TRUE,C,3,17
+C18,IO_L17N_0,0,I/O,TRUE,C,3,18
+C19,GND,GND,GND,,C,3,19
+C20,IO_L11N_0,0,I/O,TRUE,C,3,20
+C21,IO_L09P_0,0,I/O,TRUE,C,3,21
+C22,IO_L05N_0,0,I/O,TRUE,C,3,22
+C23,IO_L06N_0,0,I/O,TRUE,C,3,23
+C24,GND,GND,GND,,C,3,24
+C25,IO_L63N_1/A23,1,DUAL,TRUE,C,3,25
+C26,IO_L63P_1/A22,1,DUAL,TRUE,C,3,26
+D1,IP_L08N_3,3,INPUT,TRUE,D,4,1
+D2,IP_L08P_3,3,INPUT,TRUE,D,4,2
+D3,IO_L06P_3,3,I/O,TRUE,D,4,3
+D4,TMS,VCCAUX,JTAG,,D,4,4
+D5,IP_0,0,INPUT,,D,4,5
+D6,IO_L44N_0,0,I/O,TRUE,D,4,6
+D7,IP_0/VREF_0,0,VREF,,D,4,7
+D8,IO_L40N_0,0,I/O,TRUE,D,4,8
+D9,IO_L37N_0,0,I/O,TRUE,D,4,9
+D10,IO_L34N_0,0,I/O,TRUE,D,4,10
+D11,IO_L32N_0/VREF_0,0,VREF,TRUE,D,4,11
+D12,IP_0,0,INPUT,,D,4,12
+D13,IO_L30P_0,0,I/O,TRUE,D,4,13
+D14,IP_0/VREF_0,0,VREF,,D,4,14
+D15,IP_0,0,INPUT,,D,4,15
+D16,IO_L22P_0,0,I/O,TRUE,D,4,16
+D17,IO_L21P_0,0,I/O,TRUE,D,4,17
+D18,IO_L17P_0,0,I/O,TRUE,D,4,18
+D19,IP_0,0,INPUT,,D,4,19
+D20,IO_L11P_0,0,I/O,TRUE,D,4,20
+D21,IO_L10N_0,0,I/O,TRUE,D,4,21
+D22,IO_L05P_0,0,I/O,TRUE,D,4,22
+D23,IO_L06P_0,0,I/O,TRUE,D,4,23
+D24,IO_L61N_1,1,I/O,TRUE,D,4,24
+D25,IO_L61P_1,1,I/O,TRUE,D,4,25
+D26,IO_L60N_1,1,I/O,TRUE,D,4,26
+E1,IO_L11P_3,3,I/O,TRUE,E,5,1
+E2,VCCO_3,3,VCCO,,E,5,2
+E3,IO_L07P_3,3,I/O,TRUE,E,5,3
+E4,IO_L06N_3,3,I/O,TRUE,E,5,4
+E5,VCCAUX,VCCAUX,VCCAUX,,E,5,5
+E6,IP_0,0,INPUT,,E,5,6
+E7,IO_L48N_0,0,I/O,TRUE,E,5,7
+E8,VCCO_0,0,VCCO,,E,5,8
+E9,IP_0,0,INPUT,,E,5,9
+E10,IO_L37P_0,0,I/O,TRUE,E,5,10
+E11,IP_0,0,INPUT,,E,5,11
+E12,IO_L31P_0,0,I/O,TRUE,E,5,12
+E13,VCCO_0,0,VCCO,,E,5,13
+E14,IO_L24P_0,0,I/O,TRUE,E,5,14
+E15,IO_L20N_0/VREF_0,0,VREF,TRUE,E,5,15
+E16,VCCAUX,VCCAUX,VCCAUX,,E,5,16
+E17,IO_L13N_0,0,I/O,TRUE,E,5,17
+E18,IP_0,0,INPUT,,E,5,18
+E19,VCCO_0,0,VCCO,,E,5,19
+E20,IP_0,0,INPUT,,E,5,20
+E21,IO_L10P_0,0,I/O,TRUE,E,5,21
+E22,VCCAUX,VCCAUX,VCCAUX,,E,5,22
+E23,TDO,VCCAUX,JTAG,,E,5,23
+E24,IO_L56P_1,1,I/O,TRUE,E,5,24
+E25,VCCO_1,1,VCCO,,E,5,25
+E26,IO_L60P_1,1,I/O,TRUE,E,5,26
+F1,GND,GND,GND,,F,6,1
+F2,IO_L11N_3,3,I/O,TRUE,F,6,2
+F3,IO_L14N_3,3,I/O,TRUE,F,6,3
+F4,IO_L07N_3,3,I/O,TRUE,F,6,4
+F5,IO_L09P_3,3,I/O,TRUE,F,6,5
+F6,GND,GND,GND,,F,6,6
+F7,IO_L48P_0,0,I/O,TRUE,F,6,7
+F8,IO_L52P_0/VREF_0,0,VREF,TRUE,F,6,8
+F9,IP_0,0,INPUT,,F,6,9
+F10,IP_0,0,INPUT,,F,6,10
+F11,GND,GND,GND,,F,6,11
+F12,IO_L31N_0,0,I/O,TRUE,F,6,12
+F13,IO_L27P_0/GCLK8,0,GCLK,TRUE,F,6,13
+F14,IO_L24N_0,0,I/O,TRUE,F,6,14
+F15,IO_L20P_0,0,I/O,TRUE,F,6,15
+F16,GND,GND,GND,,F,6,16
+F17,IO_L13P_0,0,I/O,TRUE,F,6,17
+F18,IP_0,0,INPUT,,F,6,18
+F19,IO_L02N_0,0,I/O,TRUE,F,6,19
+F20,IO_L01N_0,0,I/O,TRUE,F,6,20
+F21,GND,GND,GND,,F,6,21
+F22,IO_L58P_1/VREF_1,1,VREF,TRUE,F,6,22
+F23,IO_L56N_1,1,I/O,TRUE,F,6,23
+F24,IO_L54N_1,1,I/O,TRUE,F,6,24
+F25,IO_L54P_1,1,I/O,TRUE,F,6,25
+F26,GND,GND,GND,,F,6,26
+G1,IP_L16N_3,3,INPUT,TRUE,G,7,1
+G2,IP_L16P_3,3,INPUT,TRUE,G,7,2
+G3,IO_L14P_3,3,I/O,TRUE,G,7,3
+G4,IO_L09N_3,3,I/O,TRUE,G,7,4
+G5,IP_L12P_3,3,INPUT,TRUE,G,7,5
+G6,IO_L03P_3,3,I/O,TRUE,G,7,6
+G7,TDI,VCCAUX,JTAG,,G,7,7
+G8,IO_L52N_0/PUDC_B,0,DUAL,TRUE,G,7,8
+G9,IO_L47P_0,0,I/O,TRUE,G,7,9
+G10,IO_L46P_0,0,I/O,TRUE,G,7,10
+G11,IP_0/VREF_0,0,VREF,,G,7,11
+G12,IO_L35P_0,0,I/O,TRUE,G,7,12
+G13,IO_L27N_0/GCLK9,0,GCLK,TRUE,G,7,13
+G14,IP_0,0,INPUT,,G,7,14
+G15,IO_L16P_0,0,I/O,TRUE,G,7,15
+G16,IP_0,0,INPUT,,G,7,16
+G17,IO_L08N_0,0,I/O,TRUE,G,7,17
+G18,IP_0,0,INPUT,,G,7,18
+G19,IO_L02P_0/VREF_0,0,VREF,TRUE,G,7,19
+G20,IO_L01P_0,0,I/O,TRUE,G,7,20
+G21,IO_L64N_1/A25,1,DUAL,TRUE,G,7,21
+G22,IO_L58N_1,1,I/O,TRUE,G,7,22
+G23,IO_L51P_1,1,I/O,TRUE,G,7,23
+G24,IO_L51N_1,1,I/O,TRUE,G,7,24
+G25,IP_L52N_1/VREF_1,1,VREF,TRUE,G,7,25
+G26,IP_L52P_1,1,INPUT,TRUE,G,7,26
+H1,IO_L17N_3,3,I/O,TRUE,H,8,1
+H2,IO_L17P_3,3,I/O,TRUE,H,8,2
+H3,GND,GND,GND,,H,8,3
+H4,IP_L12N_3/VREF_3,3,VREF,TRUE,H,8,4
+H5,VCCO_3,3,VCCO,,H,8,5
+H6,IO_L10N_3,3,I/O,TRUE,H,8,6
+H7,IO_L03N_3,3,I/O,TRUE,H,8,7
+H8,GND,GND,GND,,H,8,8
+H9,IO_L47N_0,0,I/O,TRUE,H,8,9
+H10,IO_L46N_0,0,I/O,TRUE,H,8,10
+H11,VCCO_0,0,VCCO,,H,8,11
+H12,IO_L35N_0,0,I/O,TRUE,H,8,12
+H13,IP_0,0,INPUT,,H,8,13
+H14,GND,GND,GND,,H,8,14
+H15,IO_L16N_0,0,I/O,TRUE,H,8,15
+H16,VCCO_0,0,VCCO,,H,8,16
+H17,IO_L08P_0,0,I/O,TRUE,H,8,17
+H18,IP_0,0,INPUT,,H,8,18
+H19,GND,GND,GND,,H,8,19
+H20,IO_L64P_1/A24,1,DUAL,TRUE,H,8,20
+H21,IO_L62N_1/A21,1,DUAL,TRUE,H,8,21
+H22,VCCO_1,1,VCCO,,H,8,22
+H23,IP_L48P_1,1,INPUT,TRUE,H,8,23
+H24,IP_L48N_1,1,INPUT,TRUE,H,8,24
+H25,IP_L44N_1,1,INPUT,TRUE,H,8,25
+H26,IP_L44P_1/VREF_1,1,VREF,TRUE,H,8,26
+J1,IP_L24P_3,3,INPUT,TRUE,J,9,1
+J2,IP_L20N_3/VREF_3,3,VREF,TRUE,J,9,2
+J3,IP_L20P_3,3,INPUT,TRUE,J,9,3
+J4,IO_L19N_3,3,I/O,TRUE,J,9,4
+J5,IO_L19P_3,3,I/O,TRUE,J,9,5
+J6,IO_L13N_3,3,I/O,TRUE,J,9,6
+J7,IO_L10P_3,3,I/O,TRUE,J,9,7
+J8,IO_L01P_3,3,I/O,TRUE,J,9,8
+J9,IO_L01N_3,3,I/O,TRUE,J,9,9
+J10,IP_0,0,INPUT,,J,9,10
+J11,IO_L43P_0,0,I/O,TRUE,J,9,11
+J12,IO_L39P_0,0,I/O,TRUE,J,9,12
+J13,IP_0,0,INPUT,,J,9,13
+J14,IO_L25N_0/GCLK5,0,GCLK,TRUE,J,9,14
+J15,IP_0,0,INPUT,,J,9,15
+J16,IO_L12P_0,0,I/O,TRUE,J,9,16
+J17,IP_0/VREF_0,0,VREF,,J,9,17
+J18,VCCAUX,VCCAUX,VCCAUX,,J,9,18
+J19,IO_L59P_1,1,I/O,TRUE,J,9,19
+J20,IO_L59N_1,1,I/O,TRUE,J,9,20
+J21,IO_L62P_1/A20,1,DUAL,TRUE,J,9,21
+J22,IO_L49N_1,1,I/O,TRUE,J,9,22
+J23,IO_L49P_1,1,I/O,TRUE,J,9,23
+J24,GND,GND,GND,,J,9,24
+J25,IO_L43N_1/A19,1,DUAL,TRUE,J,9,25
+J26,IO_L43P_1/A18,1,DUAL,TRUE,J,9,26
+K1,IP_L24N_3,3,INPUT,TRUE,K,10,1
+K2,IO_L23N_3,3,I/O,TRUE,K,10,2
+K3,IO_L23P_3,3,I/O,TRUE,K,10,3
+K4,IO_L22N_3,3,I/O,TRUE,K,10,4
+K5,IO_L22P_3,3,I/O,TRUE,K,10,5
+K6,IO_L18P_3,3,I/O,TRUE,K,10,6
+K7,IO_L13P_3,3,I/O,TRUE,K,10,7
+K8,IO_L05N_3,3,I/O,TRUE,K,10,8
+K9,IO_L05P_3,3,I/O,TRUE,K,10,9
+K10,GND,GND,GND,,K,10,10
+K11,IO_L43N_0,0,I/O,TRUE,K,10,11
+K12,IO_L39N_0,0,I/O,TRUE,K,10,12
+K13,VCCAUX,VCCAUX,VCCAUX,,K,10,13
+K14,IO_L25P_0/GCLK4,0,GCLK,TRUE,K,10,14
+K15,VCCINT,VCCINT,VCCINT,,K,10,15
+K16,IO_L12N_0,0,I/O,TRUE,K,10,16
+K17,GND,GND,GND,,K,10,17
+K18,IO_L57N_1,1,I/O,TRUE,K,10,18
+K19,IO_L57P_1,1,I/O,TRUE,K,10,19
+K20,IO_L53N_1,1,I/O,TRUE,K,10,20
+K21,IO_L50N_1,1,I/O,TRUE,K,10,21
+K22,IO_L46N_1,1,I/O,TRUE,K,10,22
+K23,IO_L46P_1,1,I/O,TRUE,K,10,23
+K24,IP_L40P_1,1,INPUT,TRUE,K,10,24
+K25,IO_L41P_1,1,I/O,TRUE,K,10,25
+K26,IO_L41N_1,1,I/O,TRUE,K,10,26
+L1,GND,GND,GND,,L,11,1
+L2,VCCO_3,3,VCCO,,L,11,2
+L3,IO_L25N_3,3,I/O,TRUE,L,11,3
+L4,IO_L25P_3,3,I/O,TRUE,L,11,4
+L5,VCCAUX,VCCAUX,VCCAUX,,L,11,5
+L6,GND,GND,GND,,L,11,6
+L7,IO_L18N_3,3,I/O,TRUE,L,11,7
+L8,VCCO_3,3,VCCO,,L,11,8
+L9,IO_L15N_3,3,I/O,TRUE,L,11,9
+L10,IO_L15P_3,3,I/O,TRUE,L,11,10
+L11,GND,GND,GND,,L,11,11
+L12,VCCINT,VCCINT,VCCINT,,L,11,12
+L13,GND,GND,GND,,L,11,13
+L14,VCCINT,VCCINT,VCCINT,,L,11,14
+L15,GND,GND,GND,,L,11,15
+L16,VCCINT,VCCINT,VCCINT,,L,11,16
+L17,IO_L55N_1,1,I/O,TRUE,L,11,17
+L18,IO_L55P_1,1,I/O,TRUE,L,11,18
+L19,VCCO_1,1,VCCO,,L,11,19
+L20,IO_L53P_1,1,I/O,TRUE,L,11,20
+L21,GND,GND,GND,,L,11,21
+L22,IO_L50P_1,1,I/O,TRUE,L,11,22
+L23,IP_L40N_1,1,INPUT,TRUE,L,11,23
+L24,IO_L38P_1/A12,1,DUAL,TRUE,L,11,24
+L25,VCCO_1,1,VCCO,,L,11,25
+L26,GND,GND,GND,,L,11,26
+M1,IO_L29N_3/VREF_3,3,VREF,TRUE,M,12,1
+M2,IO_L29P_3,3,I/O,TRUE,M,12,2
+M3,IO_L27N_3,3,I/O,TRUE,M,12,3
+M4,IO_L27P_3,3,I/O,TRUE,M,12,4
+M5,IO_L28P_3,3,I/O,TRUE,M,12,5
+M6,IO_L28N_3,3,I/O,TRUE,M,12,6
+M7,IO_L26N_3,3,I/O,TRUE,M,12,7
+M8,IO_L26P_3,3,I/O,TRUE,M,12,8
+M9,IO_L21N_3,3,I/O,TRUE,M,12,9
+M10,IO_L21P_3,3,I/O,TRUE,M,12,10
+M11,VCCINT,VCCINT,VCCINT,,M,12,11
+M12,GND,GND,GND,,M,12,12
+M13,VCCINT,VCCINT,VCCINT,,M,12,13
+M14,GND,GND,GND,,M,12,14
+M15,VCCINT,VCCINT,VCCINT,,M,12,15
+M16,GND,GND,GND,,M,12,16
+M17,VCCINT,VCCINT,VCCINT,,M,12,17
+M18,IO_L47N_1,1,I/O,TRUE,M,12,18
+M19,IO_L47P_1,1,I/O,TRUE,M,12,19
+M20,IO_L42N_1/A17,1,DUAL,TRUE,M,12,20
+M21,IO_L45P_1,1,I/O,TRUE,M,12,21
+M22,IO_L45N_1,1,I/O,TRUE,M,12,22
+M23,IO_L38N_1/A13,1,DUAL,TRUE,M,12,23
+M24,IP_L36P_1/VREF_1,1,VREF,TRUE,M,12,24
+M25,IO_L35N_1/A11,1,DUAL,TRUE,M,12,25
+M26,IO_L35P_1/A10,1,DUAL,TRUE,M,12,26
+N1,IO_L31P_3,3,I/O,TRUE,N,13,1
+N2,IO_L31N_3,3,I/O,TRUE,N,13,2
+N3,GND,GND,GND,,N,13,3
+N4,IO_L30N_3,3,I/O,TRUE,N,13,4
+N5,IO_L30P_3,3,I/O,TRUE,N,13,5
+N6,IO_L32P_3/LHCLK0,3,LHCLK,TRUE,N,13,6
+N7,IO_L32N_3/LHCLK1,3,LHCLK,TRUE,N,13,7
+N8,GND,GND,GND,,N,13,8
+N9,IO_L35P_3/TRDY2/LHCLK6,3,LHCLK,TRUE,N,13,9
+N10,VCCAUX,VCCAUX,VCCAUX,,N,13,10
+N11,GND,GND,GND,,N,13,11
+N12,VCCINT,VCCINT,VCCINT,,N,13,12
+N13,VCCINT,VCCINT,VCCINT,,N,13,13
+N14,VCCINT,VCCINT,VCCINT,,N,13,14
+N15,GND,GND,GND,,N,13,15
+N16,VCCINT,VCCINT,VCCINT,,N,13,16
+N17,IO_L39N_1/A15,1,DUAL,TRUE,N,13,17
+N18,IO_L39P_1/A14,1,DUAL,TRUE,N,13,18
+N19,IO_L34N_1/RHCLK7,1,RHCLK,TRUE,N,13,19
+N20,IO_L42P_1/A16,1,DUAL,TRUE,N,13,20
+N21,IO_L37N_1,1,I/O,TRUE,N,13,21
+N22,VCCO_1,1,VCCO,,N,13,22
+N23,IP_L36N_1,1,INPUT,TRUE,N,13,23
+N24,IO_L33N_1/RHCLK5,1,RHCLK,TRUE,N,13,24
+N25,IP_L32N_1,1,INPUT,TRUE,N,13,25
+N26,IP_L32P_1,1,INPUT,TRUE,N,13,26
+P1,IO_L33P_3/LHCLK2,3,LHCLK,TRUE,P,14,1
+P2,IO_L33N_3/IRDY2/LHCLK3,3,LHCLK,TRUE,P,14,2
+P3,IO_L34N_3/LHCLK5,3,LHCLK,TRUE,P,14,3
+P4,IO_L34P_3/LHCLK4,3,LHCLK,TRUE,P,14,4
+P5,VCCO_3,3,VCCO,,P,14,5
+P6,IO_L39N_3,3,I/O,TRUE,P,14,6
+P7,IO_L39P_3,3,I/O,TRUE,P,14,7
+P8,IO_L41P_3,3,I/O,TRUE,P,14,8
+P9,IO_L41N_3,3,I/O,TRUE,P,14,9
+P10,IO_L35N_3/LHCLK7,3,LHCLK,TRUE,P,14,10
+P11,VCCINT,VCCINT,VCCINT,,P,14,11
+P12,GND,GND,GND,,P,14,12
+P13,VCCINT,VCCINT,VCCINT,,P,14,13
+P14,VCCINT,VCCINT,VCCINT,,P,14,14
+P15,VCCINT,VCCINT,VCCINT,,P,14,15
+P16,GND,GND,GND,,P,14,16
+P17,VCCAUX,VCCAUX,VCCAUX,,P,14,17
+P18,IO_L34P_1/IRDY1/RHCLK6,1,RHCLK,TRUE,P,14,18
+P19,GND,GND,GND,,P,14,19
+P20,IO_L30N_1/RHCLK1,1,RHCLK,TRUE,P,14,20
+P21,IO_L30P_1/RHCLK0,1,RHCLK,TRUE,P,14,21
+P22,IO_L37P_1,1,I/O,TRUE,P,14,22
+P23,IO_L33P_1/RHCLK4,1,RHCLK,TRUE,P,14,23
+P24,GND,GND,GND,,P,14,24
+P25,IO_L31N_1/TRDY1/RHCLK3,1,RHCLK,TRUE,P,14,25
+P26,IO_L31P_1/RHCLK2,1,RHCLK,TRUE,P,14,26
+R1,IO_L36P_3/VREF_3,3,VREF,TRUE,R,15,1
+R2,IO_L36N_3,3,I/O,TRUE,R,15,2
+R3,IO_L37P_3,3,I/O,TRUE,R,15,3
+R4,IO_L37N_3,3,I/O,TRUE,R,15,4
+R5,IO_L40P_3,3,I/O,TRUE,R,15,5
+R6,IO_L40N_3,3,I/O,TRUE,R,15,6
+R7,IO_L45N_3,3,I/O,TRUE,R,15,7
+R8,IO_L45P_3,3,I/O,TRUE,R,15,8
+R9,IO_L43N_3,3,I/O,TRUE,R,15,9
+R10,IO_L43P_3/VREF_3,3,VREF,TRUE,R,15,10
+R11,GND,GND,GND,,R,15,11
+R12,VCCINT,VCCINT,VCCINT,,R,15,12
+R13,GND,GND,GND,,R,15,13
+R14,VCCINT,VCCINT,VCCINT,,R,15,14
+R15,GND,GND,GND,,R,15,15
+R16,VCCINT,VCCINT,VCCINT,,R,15,16
+R17,IO_L27N_1/A7,1,DUAL,TRUE,R,15,17
+R18,IO_L27P_1/A6,1,DUAL,TRUE,R,15,18
+R19,IO_L22P_1,1,I/O,TRUE,R,15,19
+R20,IO_L22N_1,1,I/O,TRUE,R,15,20
+R21,IO_L25P_1/A2,1,DUAL,TRUE,R,15,21
+R22,IO_L25N_1/A3,1,DUAL,TRUE,R,15,22
+R23,IP_L28P_1/VREF_1,1,VREF,TRUE,R,15,23
+R24,IP_L28N_1,1,INPUT,TRUE,R,15,24
+R25,IO_L29P_1/A8,1,DUAL,TRUE,R,15,25
+R26,IO_L29N_1/A9,1,DUAL,TRUE,R,15,26
+T1,GND,GND,GND,,T,16,1
+T2,VCCO_3,3,VCCO,,T,16,2
+T3,IO_L38P_3,3,I/O,TRUE,T,16,3
+T4,IO_L38N_3,3,I/O,TRUE,T,16,4
+T5,IO_L42P_3,3,I/O,TRUE,T,16,5
+T6,GND,GND,GND,,T,16,6
+T7,IO_L51P_3,3,I/O,TRUE,T,16,7
+T8,VCCO_3,3,VCCO,,T,16,8
+T9,IO_L48N_3,3,I/O,TRUE,T,16,9
+T10,IO_L48P_3,3,I/O,TRUE,T,16,10
+T11,VCCINT,VCCINT,VCCINT,,T,16,11
+T12,GND,GND,GND,,T,16,12
+T13,VCCINT,VCCINT,VCCINT,,T,16,13
+T14,GND,GND,GND,,T,16,14
+T15,VCCINT,VCCINT,VCCINT,,T,16,15
+T16,GND,GND,GND,,T,16,16
+T17,IO_L17N_1,1,I/O,TRUE,T,16,17
+T18,IO_L17P_1,1,I/O,TRUE,T,16,18
+T19,VCCO_1,1,VCCO,,T,16,19
+T20,IO_L14N_1,1,I/O,TRUE,T,16,20
+T21,GND,GND,GND,,T,16,21
+T22,VCCAUX,VCCAUX,VCCAUX,,T,16,22
+T23,IO_L26P_1/A4,1,DUAL,TRUE,T,16,23
+T24,IO_L26N_1/A5,1,DUAL,TRUE,T,16,24
+T25,VCCO_1,1,VCCO,,T,16,25
+T26,GND,GND,GND,,T,16,26
+U1,IO_L44P_3,3,I/O,TRUE,U,17,1
+U2,IO_L44N_3,3,I/O,TRUE,U,17,2
+U3,IP_L46P_3,3,INPUT,TRUE,U,17,3
+U4,IO_L42N_3,3,I/O,TRUE,U,17,4
+U5,IO_L49P_3,3,I/O,TRUE,U,17,5
+U6,IO_L51N_3,3,I/O,TRUE,U,17,6
+U7,IO_L56P_3,3,I/O,TRUE,U,17,7
+U8,IO_L56N_3,3,I/O,TRUE,U,17,8
+U9,IO_L61P_3,3,I/O,TRUE,U,17,9
+U10,GND,GND,GND,,U,17,10
+U11,IO_L13N_2,2,I/O,TRUE,U,17,11
+U12,VCCINT,VCCINT,VCCINT,,U,17,12
+U13,GND,GND,GND,,U,17,13
+U14,VCCAUX,VCCAUX,VCCAUX,,U,17,14
+U15,IO_L35N_2,2,I/O,TRUE,U,17,15
+U16,IO_L42N_2,2,I/O,TRUE,U,17,16
+U17,GND,GND,GND,,U,17,17
+U18,IO_L12N_1,1,I/O,TRUE,U,17,18
+U19,IO_L12P_1,1,I/O,TRUE,U,17,19
+U20,IO_L10N_1,1,I/O,TRUE,U,17,20
+U21,IO_L14P_1,1,I/O,TRUE,U,17,21
+U22,IO_L21N_1,1,I/O,TRUE,U,17,22
+U23,IO_L23P_1,1,I/O,TRUE,U,17,23
+U24,IO_L23N_1/VREF_1,1,VREF,TRUE,U,17,24
+U25,IP_L24P_1,1,INPUT,TRUE,U,17,25
+U26,IP_L24N_1/VREF_1,1,VREF,TRUE,U,17,26
+V1,IO_L47P_3,3,I/O,TRUE,V,18,1
+V2,IO_L47N_3,3,I/O,TRUE,V,18,2
+V3,GND,GND,GND,,V,18,3
+V4,IP_L46N_3,3,INPUT,TRUE,V,18,4
+V5,IO_L49N_3,3,I/O,TRUE,V,18,5
+V6,IO_L59N_3,3,I/O,TRUE,V,18,6
+V7,IO_L59P_3,3,I/O,TRUE,V,18,7
+V8,IO_L61N_3,3,I/O,TRUE,V,18,8
+V9,VCCAUX,VCCAUX,VCCAUX,,V,18,9
+V10,IO_L09P_2,2,I/O,TRUE,V,18,10
+V11,IO_L13P_2,2,I/O,TRUE,V,18,11
+V12,IO_L16P_2,2,I/O,TRUE,V,18,12
+V13,IO_L20P_2,2,I/O,TRUE,V,18,13
+V14,IO_L31P_2,2,I/O,TRUE,V,18,14
+V15,IO_L35P_2,2,I/O,TRUE,V,18,15
+V16,IO_L42P_2,2,I/O,TRUE,V,18,16
+V17,IO_L46N_2,2,I/O,TRUE,V,18,17
+V18,IO_L08P_1,1,I/O,TRUE,V,18,18
+V19,IO_L08N_1,1,I/O,TRUE,V,18,19
+V20,SUSPEND,1,PWRMGMT,,V,18,20
+V21,IO_L10P_1,1,I/O,TRUE,V,18,21
+V22,IO_L18N_1,1,I/O,TRUE,V,18,22
+V23,IO_L21P_1,1,I/O,TRUE,V,18,23
+V24,IO_L19P_1,1,I/O,TRUE,V,18,24
+V25,IO_L19N_1,1,I/O,TRUE,V,18,25
+V26,IP_L20N_1/VREF_1,1,VREF,TRUE,V,18,26
+W1,IP_L50P_3,3,INPUT,TRUE,W,19,1
+W2,IP_L50N_3/VREF_3,3,VREF,TRUE,W,19,2
+W3,IO_L52P_3,3,I/O,TRUE,W,19,3
+W4,IO_L52N_3,3,I/O,TRUE,W,19,4
+W5,VCCO_3,3,VCCO,,W,19,5
+W6,IO_L63N_3,3,I/O,TRUE,W,19,6
+W7,IO_L63P_3,3,I/O,TRUE,W,19,7
+W8,GND,GND,GND,,W,19,8
+W9,IO_L05P_2,2,I/O,TRUE,W,19,9
+W10,IO_L09N_2,2,I/O,TRUE,W,19,10
+W11,VCCO_2,2,VCCO,,W,19,11
+W12,IO_L16N_2,2,I/O,TRUE,W,19,12
+W13,IO_L20N_2,2,I/O,TRUE,W,19,13
+W14,GND,GND,GND,,W,19,14
+W15,IO_L31N_2,2,I/O,TRUE,W,19,15
+W16,VCCO_2,2,VCCO,,W,19,16
+W17,IO_L46P_2,2,I/O,TRUE,W,19,17
+W18,IP_2,2,INPUT,,W,19,18
+W19,GND,GND,GND,,W,19,19
+W20,IO_L04P_1,1,I/O,TRUE,W,19,20
+W21,IO_L04N_1,1,I/O,TRUE,W,19,21
+W22,VCCO_1,1,VCCO,,W,19,22
+W23,IO_L18P_1,1,I/O,TRUE,W,19,23
+W24,GND,GND,GND,,W,19,24
+W25,IP_L16P_1,1,INPUT,TRUE,W,19,25
+W26,IP_L20P_1,1,INPUT,TRUE,W,19,26
+Y1,IO_L53P_3,3,I/O,TRUE,Y,20,1
+Y2,IO_L53N_3,3,I/O,TRUE,Y,20,2
+Y3,IP_L54P_3,3,INPUT,TRUE,Y,20,3
+Y4,IP_L54N_3,3,INPUT,TRUE,Y,20,4
+Y5,IO_L57P_3,3,I/O,TRUE,Y,20,5
+Y6,IO_L57N_3,3,I/O,TRUE,Y,20,6
+Y7,IO_L02P_2/M2,2,DUAL,TRUE,Y,20,7
+Y8,IP_2,2,INPUT,,Y,20,8
+Y9,IO_L05N_2,2,I/O,TRUE,Y,20,9
+Y10,IO_L12P_2,2,I/O,TRUE,Y,20,10
+Y11,IP_2,2,INPUT,,Y,20,11
+Y12,IO_L17P_2/RDWR_B,2,DUAL,TRUE,Y,20,12
+Y13,IO_L25N_2/GCLK13,2,GCLK,TRUE,Y,20,13
+Y14,IO_L27P_2/GCLK0,2,GCLK,TRUE,Y,20,14
+Y15,IO_L34N_2/D3,2,DUAL,TRUE,Y,20,15
+Y16,IP_2/VREF_2,2,VREF,,Y,20,16
+Y17,IO_L43N_2,2,I/O,TRUE,Y,20,17
+Y18,IP_2,2,INPUT,,Y,20,18
+Y19,IP_2/VREF_2,2,VREF,,Y,20,19
+Y20,IO_L01P_1/HDC,1,DUAL,TRUE,Y,20,20
+Y21,IO_L01N_1/LDC2,1,DUAL,TRUE,Y,20,21
+Y22,IO_L13P_1,1,I/O,TRUE,Y,20,22
+Y23,IO_L13N_1,1,I/O,TRUE,Y,20,23
+Y24,IO_L15P_1,1,I/O,TRUE,Y,20,24
+Y25,IO_L15N_1,1,I/O,TRUE,Y,20,25
+Y26,IP_L16N_1,1,INPUT,TRUE,Y,20,26

Copied: usrp-hw/trunk/sym/xilinx/XC3SD3400AFG676.csv (from rev 10171, 
usrp-hw/trunk/sym/generated/XC3SD3400AFG676.csv)
===================================================================
--- usrp-hw/trunk/sym/xilinx/XC3SD3400AFG676.csv                                
(rev 0)
+++ usrp-hw/trunk/sym/xilinx/XC3SD3400AFG676.csv        2009-01-12 22:39:36 UTC 
(rev 10209)
@@ -0,0 +1,677 @@
+PIN,XC3SD3400AFG676_PIN,XC3SD3400AFG676_BANK,TYPE,DIFF_PAIR,ROW,ROW_#,COLUMN
+A1,GND,GND,GND,,A,1,1
+A2,PROG_B,VCCAUX,CONFIG,,A,1,2
+A3,IO_L51P_0,0,I/O,TRUE,A,1,3
+A4,IO_L45P_0,0,I/O,TRUE,A,1,4
+A5,GND,GND,GND,,A,1,5
+A6,GND,GND,GND,,A,1,6
+A7,VCCO_0,0,VCCO,,A,1,7
+A8,IO_L38P_0,0,I/O,TRUE,A,1,8
+A9,IO_L36P_0,0,I/O,TRUE,A,1,9
+A10,IO_L33P_0,0,I/O,TRUE,A,1,10
+A11,GND,GND,GND,,A,1,11
+A12,IO_L29P_0,0,I/O,TRUE,A,1,12
+A13,IP_0,0,INPUT,,A,1,13
+A14,IO_L26N_0/GCLK7,0,GCLK,TRUE,A,1,14
+A15,IO_L23N_0,0,I/O,TRUE,A,1,15
+A16,GND,GND,GND,,A,1,16
+A17,IP_0,0,INPUT,,A,1,17
+A18,IO_L18N_0,0,I/O,TRUE,A,1,18
+A19,IO_L15N_0,0,I/O,TRUE,A,1,19
+A20,IO_L14N_0,0,I/O,TRUE,A,1,20
+A21,GND,GND,GND,,A,1,21
+A22,IO_L07N_0,0,I/O,TRUE,A,1,22
+A23,GND,GND,GND,,A,1,23
+A24,VCCAUX,VCCAUX,VCCAUX,,A,1,24
+A25,TCK,VCCAUX,JTAG,,A,1,25
+A26,GND,GND,GND,,A,1,26
+AA1,GND,GND,GND,,AA,21,1
+AA2,IO_L55P_3,3,I/O,TRUE,AA,21,2
+AA3,IO_L55N_3,3,I/O,TRUE,AA,21,3
+AA4,GND,GND,GND,,AA,21,4
+AA5,IP_3/VREF_3,3,VREF,,AA,21,5
+AA6,GND,GND,GND,,AA,21,6
+AA7,IO_L02N_2/CSO_B,2,DUAL,TRUE,AA,21,7
+AA8,VCCINT,VCCINT,VCCINT,,AA,21,8
+AA9,IP_2/VREF_2,2,VREF,,AA,21,9
+AA10,IO_L12N_2,2,I/O,TRUE,AA,21,10
+AA11,GND,GND,GND,,AA,21,11
+AA12,IO_L17N_2/VS2,2,DUAL,TRUE,AA,21,12
+AA13,IO_L25P_2/GCLK12,2,GCLK,TRUE,AA,21,13
+AA14,IO_L27N_2/GCLK1,2,GCLK,TRUE,AA,21,14
+AA15,IO_L34P_2/INIT_B,2,DUAL,TRUE,AA,21,15
+AA16,GND,GND,GND,,AA,21,16
+AA17,IO_L43P_2,2,I/O,TRUE,AA,21,17
+AA18,IO_L47N_2,2,I/O,TRUE,AA,21,18
+AA19,GND,GND,GND,,AA,21,19
+AA20,IP_2/VREF_2,2,VREF,,AA,21,20
+AA21,GND,GND,GND,,AA,21,21
+AA22,IO_L09P_1,1,I/O,TRUE,AA,21,22
+AA23,IO_L09N_1,1,I/O,TRUE,AA,21,23
+AA24,IO_L11P_1,1,I/O,TRUE,AA,21,24
+AA25,IO_L11N_1,1,I/O,TRUE,AA,21,25
+AA26,GND,GND,GND,,AA,21,26
+AB1,IO_L60P_3,3,I/O,TRUE,AB,22,1
+AB2,VCCO_3,3,VCCO,,AB,22,2
+AB3,GND,GND,GND,,AB,22,3
+AB4,VCCAUX,VCCAUX,VCCAUX,,AB,22,4
+AB5,VCCAUX,VCCAUX,VCCAUX,,AB,22,5
+AB6,IP_2/VREF_2,2,VREF,,AB,22,6
+AB7,IO_L14N_2,2,I/O,TRUE,AB,22,7
+AB8,VCCO_2,2,VCCO,,AB,22,8
+AB9,IO_L15P_2,2,I/O,TRUE,AB,22,9
+AB10,GND,GND,GND,,AB,22,10
+AB11,VCCAUX,VCCAUX,VCCAUX,,AB,22,11
+AB12,IO_L21P_2,2,I/O,TRUE,AB,22,12
+AB13,IP_2,2,INPUT,,AB,22,13
+AB14,VCCO_2,2,VCCO,,AB,22,14
+AB15,IO_L30N_2/MOSI/CSI_B,2,DUAL,TRUE,AB,22,15
+AB16,IO_L38N_2,2,I/O,TRUE,AB,22,16
+AB17,VCCAUX,VCCAUX,VCCAUX,,AB,22,17
+AB18,IO_L47P_2,2,I/O,TRUE,AB,22,18
+AB19,VCCO_2,2,VCCO,,AB,22,19
+AB20,GND,GND,GND,,AB,22,20
+AB21,DONE,VCCAUX,CONFIG,,AB,22,21
+AB22,VCCAUX,VCCAUX,VCCAUX,,AB,22,22
+AB23,IO_L07P_1,1,I/O,TRUE,AB,22,23
+AB24,IO_L07N_1/VREF_1,1,VREF,TRUE,AB,22,24
+AB25,VCCO_1,1,VCCO,,AB,22,25
+AB26,IO_L06N_1,1,I/O,TRUE,AB,22,26
+AC1,IO_L60N_3,3,I/O,TRUE,AC,23,1
+AC2,IO_L64P_3,3,I/O,TRUE,AC,23,2
+AC3,IO_L64N_3,3,I/O,TRUE,AC,23,3
+AC4,IO_L01P_2/M1,2,DUAL,TRUE,AC,23,4
+AC5,GND,GND,GND,,AC,23,5
+AC6,IO_L08P_2,2,I/O,TRUE,AC,23,6
+AC7,GND,GND,GND,,AC,23,7
+AC8,IO_L14P_2,2,I/O,TRUE,AC,23,8
+AC9,IO_L15N_2,2,I/O,TRUE,AC,23,9
+AC10,IP_2/VREF_2,2,VREF,,AC,23,10
+AC11,IO_L23N_2,2,I/O,TRUE,AC,23,11
+AC12,IO_L21N_2,2,I/O,TRUE,AC,23,12
+AC13,IP_2,2,INPUT,,AC,23,13
+AC14,IO_L29N_2,2,I/O,TRUE,AC,23,14
+AC15,IO_L30P_2,2,I/O,TRUE,AC,23,15
+AC16,IO_L38P_2,2,I/O,TRUE,AC,23,16
+AC17,IP_2,2,INPUT,,AC,23,17
+AC18,GND,GND,GND,,AC,23,18
+AC19,IO_L40N_2,2,I/O,TRUE,AC,23,19
+AC20,IO_L41N_2,2,I/O,TRUE,AC,23,20
+AC21,IO_L45N_2,2,I/O,TRUE,AC,23,21
+AC22,IO_2,2,I/O,,AC,23,22
+AC23,IO_L03P_1/A0,1,DUAL,TRUE,AC,23,23
+AC24,IO_L03N_1/A1,1,DUAL,TRUE,AC,23,24
+AC25,IO_L05N_1,1,I/O,TRUE,AC,23,25
+AC26,IO_L06P_1,1,I/O,TRUE,AC,23,26
+AD1,IO_L65P_3,3,I/O,TRUE,AD,24,1
+AD2,IO_L65N_3,3,I/O,TRUE,AD,24,2
+AD3,GND,GND,GND,,AD,24,3
+AD4,IO_L01N_2/M0,2,DUAL,TRUE,AD,24,4
+AD5,GND,GND,GND,,AD,24,5
+AD6,IO_L08N_2,2,I/O,TRUE,AD,24,6
+AD7,IO_L11P_2,2,I/O,TRUE,AD,24,7
+AD8,GND,GND,GND,,AD,24,8
+AD9,IP_2,2,INPUT,,AD,24,9
+AD10,IP_2,2,INPUT,,AD,24,10
+AD11,IO_L23P_2,2,I/O,TRUE,AD,24,11
+AD12,IP_2/VREF_2,2,VREF,,AD,24,12
+AD13,GND,GND,GND,,AD,24,13
+AD14,IO_L29P_2,2,I/O,TRUE,AD,24,14
+AD15,IO_L32P_2/AWAKE,2,PWRMGMT,TRUE,AD,24,15
+AD16,IP_2,2,INPUT,,AD,24,16
+AD17,IO_L33N_2,2,I/O,TRUE,AD,24,17
+AD18,GND,GND,GND,,AD,24,18
+AD19,IO_L40P_2,2,I/O,TRUE,AD,24,19
+AD20,IO_L41P_2,2,I/O,TRUE,AD,24,20
+AD21,IO_L44N_2,2,I/O,TRUE,AD,24,21
+AD22,IO_L45P_2,2,I/O,TRUE,AD,24,22
+AD23,GND,GND,GND,,AD,24,23
+AD24,GND,GND,GND,,AD,24,24
+AD25,IO_L02N_1/LDC0,1,DUAL,TRUE,AD,24,25
+AD26,IO_L05P_1,1,I/O,TRUE,AD,24,26
+AE1,IP_L66P_3,3,INPUT,TRUE,AE,25,1
+AE2,IP_L66N_3/VREF_3,3,VREF,TRUE,AE,25,2
+AE3,IO_L06P_2,2,I/O,TRUE,AE,25,3
+AE4,IO_L07P_2,2,I/O,TRUE,AE,25,4
+AE5,VCCO_2,2,VCCO,,AE,25,5
+AE6,IO_L10N_2,2,I/O,TRUE,AE,25,6
+AE7,IO_L11N_2,2,I/O,TRUE,AE,25,7
+AE8,IO_L18P_2,2,I/O,TRUE,AE,25,8
+AE9,IO_L19P_2/VS1,2,DUAL,TRUE,AE,25,9
+AE10,IO_L22P_2/D7,2,DUAL,TRUE,AE,25,10
+AE11,VCCO_2,2,VCCO,,AE,25,11
+AE12,IO_L24N_2/D4,2,DUAL,TRUE,AE,25,12
+AE13,IO_L26N_2/GCLK15,2,GCLK,TRUE,AE,25,13
+AE14,IO_L28N_2/GCLK3,2,GCLK,TRUE,AE,25,14
+AE15,IO_L32N_2/DOUT,2,DUAL,TRUE,AE,25,15
+AE16,VCCO_2,2,VCCO,,AE,25,16
+AE17,IO_L33P_2,2,I/O,TRUE,AE,25,17
+AE18,IO_L36N_2/D1,2,DUAL,TRUE,AE,25,18
+AE19,IO_L37N_2,2,I/O,TRUE,AE,25,19
+AE20,IO_L39N_2,2,I/O,TRUE,AE,25,20
+AE21,IO_L44P_2,2,I/O,TRUE,AE,25,21
+AE22,VCCO_2,2,VCCO,,AE,25,22
+AE23,IO_L48N_2,2,I/O,TRUE,AE,25,23
+AE24,IO_L52N_2/CCLK,2,DUAL,TRUE,AE,25,24
+AE25,IO_L51N_2,2,I/O,TRUE,AE,25,25
+AE26,IO_L02P_1/LDC1,1,DUAL,TRUE,AE,25,26
+AF1,GND,GND,GND,,AF,26,1
+AF2,VCCAUX,VCCAUX,VCCAUX,,AF,26,2
+AF3,IO_L06N_2,2,I/O,TRUE,AF,26,3
+AF4,IO_L07N_2,2,I/O,TRUE,AF,26,4
+AF5,IO_L10P_2,2,I/O,TRUE,AF,26,5
+AF6,GND,GND,GND,,AF,26,6
+AF7,VCCO_2,2,VCCO,,AF,26,7
+AF8,IO_L18N_2,2,I/O,TRUE,AF,26,8
+AF9,IO_L19N_2/VS0,2,DUAL,TRUE,AF,26,9
+AF10,IO_L22N_2/D6,2,DUAL,TRUE,AF,26,10
+AF11,GND,GND,GND,,AF,26,11
+AF12,IO_L24P_2/D5,2,DUAL,TRUE,AF,26,12
+AF13,IO_L26P_2/GCLK14,2,GCLK,TRUE,AF,26,13
+AF14,IO_L28P_2/GCLK2,2,GCLK,TRUE,AF,26,14
+AF15,IP_2/VREF_2,2,VREF,,AF,26,15
+AF16,GND,GND,GND,,AF,26,16
+AF17,IP_2/VREF_2,2,VREF,,AF,26,17
+AF18,IO_L36P_2/D2,2,DUAL,TRUE,AF,26,18
+AF19,IO_L37P_2,2,I/O,TRUE,AF,26,19
+AF20,IO_L39P_2,2,I/O,TRUE,AF,26,20
+AF21,GND,GND,GND,,AF,26,21
+AF22,IP_2/VREF_2,2,VREF,,AF,26,22
+AF23,IO_L48P_2,2,I/O,TRUE,AF,26,23
+AF24,IO_L52P_2/D0/DIN/MISO,2,DUAL,TRUE,AF,26,24
+AF25,IO_L51P_2,2,I/O,TRUE,AF,26,25
+AF26,GND,GND,GND,,AF,26,26
+B1,IO_L02N_3,3,I/O,TRUE,B,2,1
+B2,IO_L02P_3,3,I/O,TRUE,B,2,2
+B3,IO_L51N_0,0,I/O,TRUE,B,2,3
+B4,IO_L45N_0,0,I/O,TRUE,B,2,4
+B5,VCCO_0,0,VCCO,,B,2,5
+B6,IO_L41P_0,0,I/O,TRUE,B,2,6
+B7,IO_L42P_0,0,I/O,TRUE,B,2,7
+B8,IO_L38N_0,0,I/O,TRUE,B,2,8
+B9,IO_L36N_0,0,I/O,TRUE,B,2,9
+B10,IO_L33N_0,0,I/O,TRUE,B,2,10
+B11,VCCO_0,0,VCCO,,B,2,11
+B12,IO_L29N_0,0,I/O,TRUE,B,2,12
+B13,IO_L28P_0/GCLK10,0,GCLK,TRUE,B,2,13
+B14,IO_L26P_0/GCLK6,0,GCLK,TRUE,B,2,14
+B15,IO_L23P_0,0,I/O,TRUE,B,2,15
+B16,VCCO_0,0,VCCO,,B,2,16
+B17,IO_L19N_0,0,I/O,TRUE,B,2,17
+B18,IO_L18P_0,0,I/O,TRUE,B,2,18
+B19,IO_L15P_0,0,I/O,TRUE,B,2,19
+B20,IO_L14P_0/VREF_0,0,VREF,TRUE,B,2,20
+B21,IO_L09N_0,0,I/O,TRUE,B,2,21
+B22,VCCO_0,0,VCCO,,B,2,22
+B23,IO_L07P_0,0,I/O,TRUE,B,2,23
+B24,GND,GND,GND,,B,2,24
+B25,GND,GND,GND,,B,2,25
+B26,IP_1/VREF_1,1,VREF,,B,2,26
+C1,IP_3/VREF_3,3,VREF,,C,3,1
+C2,VCCO_3,3,VCCO,,C,3,2
+C3,GND,GND,GND,,C,3,3
+C4,VCCINT,VCCINT,VCCINT,,C,3,4
+C5,IO_L44P_0,0,I/O,TRUE,C,3,5
+C6,IO_L41N_0,0,I/O,TRUE,C,3,6
+C7,IO_L42N_0,0,I/O,TRUE,C,3,7
+C8,IO_L40P_0,0,I/O,TRUE,C,3,8
+C9,GND,GND,GND,,C,3,9
+C10,IO_L34P_0,0,I/O,TRUE,C,3,10
+C11,IO_L32P_0,0,I/O,TRUE,C,3,11
+C12,IO_L30N_0,0,I/O,TRUE,C,3,12
+C13,IO_L28N_0/GCLK11,0,GCLK,TRUE,C,3,13
+C14,GND,GND,GND,,C,3,14
+C15,IO_L22N_0,0,I/O,TRUE,C,3,15
+C16,IO_L21N_0,0,I/O,TRUE,C,3,16
+C17,IO_L19P_0,0,I/O,TRUE,C,3,17
+C18,IO_L17N_0,0,I/O,TRUE,C,3,18
+C19,GND,GND,GND,,C,3,19
+C20,IO_L11N_0,0,I/O,TRUE,C,3,20
+C21,IO_L09P_0,0,I/O,TRUE,C,3,21
+C22,IO_L05N_0,0,I/O,TRUE,C,3,22
+C23,IO_L06N_0,0,I/O,TRUE,C,3,23
+C24,GND,GND,GND,,C,3,24
+C25,IO_L63N_1/A23,1,DUAL,TRUE,C,3,25
+C26,IO_L63P_1/A22,1,DUAL,TRUE,C,3,26
+D1,VCCAUX,VCCAUX,VCCAUX,,D,4,1
+D2,GND,GND,GND,,D,4,2
+D3,IO_L06P_3,3,I/O,TRUE,D,4,3
+D4,TMS,VCCAUX,JTAG,,D,4,4
+D5,VCCINT,VCCINT,VCCINT,,D,4,5
+D6,IO_L44N_0,0,I/O,TRUE,D,4,6
+D7,IP_0/VREF_0,0,VREF,,D,4,7
+D8,IO_L40N_0,0,I/O,TRUE,D,4,8
+D9,IO_L37N_0,0,I/O,TRUE,D,4,9
+D10,IO_L34N_0,0,I/O,TRUE,D,4,10
+D11,IO_L32N_0/VREF_0,0,VREF,TRUE,D,4,11
+D12,IP_0,0,INPUT,,D,4,12
+D13,IO_L30P_0,0,I/O,TRUE,D,4,13
+D14,IP_0/VREF_0,0,VREF,,D,4,14
+D15,GND,GND,GND,,D,4,15
+D16,IO_L22P_0,0,I/O,TRUE,D,4,16
+D17,IO_L21P_0,0,I/O,TRUE,D,4,17
+D18,IO_L17P_0,0,I/O,TRUE,D,4,18
+D19,GND,GND,GND,,D,4,19
+D20,IO_L11P_0,0,I/O,TRUE,D,4,20
+D21,IO_L10N_0,0,I/O,TRUE,D,4,21
+D22,IO_L05P_0,0,I/O,TRUE,D,4,22
+D23,IO_L06P_0,0,I/O,TRUE,D,4,23
+D24,IO_L61N_1,1,I/O,TRUE,D,4,24
+D25,IO_L61P_1,1,I/O,TRUE,D,4,25
+D26,IO_L60N_1,1,I/O,TRUE,D,4,26
+E1,IO_L11P_3,3,I/O,TRUE,E,5,1
+E2,VCCO_3,3,VCCO,,E,5,2
+E3,IO_L07P_3,3,I/O,TRUE,E,5,3
+E4,IO_L06N_3,3,I/O,TRUE,E,5,4
+E5,VCCAUX,VCCAUX,VCCAUX,,E,5,5
+E6,VCCINT,VCCINT,VCCINT,,E,5,6
+E7,IO_L48N_0,0,I/O,TRUE,E,5,7
+E8,VCCO_0,0,VCCO,,E,5,8
+E9,GND,GND,GND,,E,5,9
+E10,IO_L37P_0,0,I/O,TRUE,E,5,10
+E11,IP_0,0,INPUT,,E,5,11
+E12,IO_L31P_0,0,I/O,TRUE,E,5,12
+E13,VCCO_0,0,VCCO,,E,5,13
+E14,IO_L24P_0,0,I/O,TRUE,E,5,14
+E15,IO_L20N_0/VREF_0,0,VREF,TRUE,E,5,15
+E16,VCCAUX,VCCAUX,VCCAUX,,E,5,16
+E17,IO_L13N_0,0,I/O,TRUE,E,5,17
+E18,IP_0,0,INPUT,,E,5,18
+E19,VCCO_0,0,VCCO,,E,5,19
+E20,VCCAUX,VCCAUX,VCCAUX,,E,5,20
+E21,IO_L10P_0,0,I/O,TRUE,E,5,21
+E22,VCCAUX,VCCAUX,VCCAUX,,E,5,22
+E23,TDO,VCCAUX,JTAG,,E,5,23
+E24,IO_L56P_1,1,I/O,TRUE,E,5,24
+E25,VCCO_1,1,VCCO,,E,5,25
+E26,IO_L60P_1,1,I/O,TRUE,E,5,26
+F1,GND,GND,GND,,F,6,1
+F2,IO_L11N_3,3,I/O,TRUE,F,6,2
+F3,IO_L14N_3,3,I/O,TRUE,F,6,3
+F4,IO_L07N_3,3,I/O,TRUE,F,6,4
+F5,IO_L09P_3,3,I/O,TRUE,F,6,5
+F6,GND,GND,GND,,F,6,6
+F7,IO_L48P_0,0,I/O,TRUE,F,6,7
+F8,IO_L52P_0/VREF_0,0,VREF,TRUE,F,6,8
+F9,VCCAUX,VCCAUX,VCCAUX,,F,6,9
+F10,VCCINT,VCCINT,VCCINT,,F,6,10
+F11,GND,GND,GND,,F,6,11
+F12,IO_L31N_0,0,I/O,TRUE,F,6,12
+F13,IO_L27P_0/GCLK8,0,GCLK,TRUE,F,6,13
+F14,IO_L24N_0,0,I/O,TRUE,F,6,14
+F15,IO_L20P_0,0,I/O,TRUE,F,6,15
+F16,GND,GND,GND,,F,6,16
+F17,IO_L13P_0,0,I/O,TRUE,F,6,17
+F18,VCCINT,VCCINT,VCCINT,,F,6,18
+F19,IO_L02N_0,0,I/O,TRUE,F,6,19
+F20,IO_L01N_0,0,I/O,TRUE,F,6,20
+F21,GND,GND,GND,,F,6,21
+F22,IO_L58P_1/VREF_1,1,VREF,TRUE,F,6,22
+F23,IO_L56N_1,1,I/O,TRUE,F,6,23
+F24,IO_L54N_1,1,I/O,TRUE,F,6,24
+F25,IO_L54P_1,1,I/O,TRUE,F,6,25
+F26,GND,GND,GND,,F,6,26
+G1,IP_3,3,INPUT,,G,7,1
+G2,GND,GND,GND,,G,7,2
+G3,IO_L14P_3,3,I/O,TRUE,G,7,3
+G4,IO_L09N_3,3,I/O,TRUE,G,7,4
+G5,GND,GND,GND,,G,7,5
+G6,IO_L03P_3,3,I/O,TRUE,G,7,6
+G7,TDI,VCCAUX,JTAG,,G,7,7
+G8,IO_L52N_0/PUDC_B,0,DUAL,TRUE,G,7,8
+G9,IO_L47P_0,0,I/O,TRUE,G,7,9
+G10,IO_L46P_0,0,I/O,TRUE,G,7,10
+G11,IP_0/VREF_0,0,VREF,,G,7,11
+G12,IO_L35P_0,0,I/O,TRUE,G,7,12
+G13,IO_L27N_0/GCLK9,0,GCLK,TRUE,G,7,13
+G14,IP_0,0,INPUT,,G,7,14
+G15,IO_L16P_0,0,I/O,TRUE,G,7,15
+G16,GND,GND,GND,,G,7,16
+G17,IO_L08N_0,0,I/O,TRUE,G,7,17
+G18,VCCINT,VCCINT,VCCINT,,G,7,18
+G19,IO_L02P_0/VREF_0,0,VREF,TRUE,G,7,19
+G20,IO_L01P_0,0,I/O,TRUE,G,7,20
+G21,IO_L64N_1/A25,1,DUAL,TRUE,G,7,21
+G22,IO_L58N_1,1,I/O,TRUE,G,7,22
+G23,IO_L51P_1,1,I/O,TRUE,G,7,23
+G24,IO_L51N_1,1,I/O,TRUE,G,7,24
+G25,IP_1/VREF_1,1,VREF,,G,7,25
+G26,VCCAUX,VCCAUX,VCCAUX,,G,7,26
+H1,IO_L17N_3,3,I/O,TRUE,H,8,1
+H2,IO_L17P_3,3,I/O,TRUE,H,8,2
+H3,GND,GND,GND,,H,8,3
+H4,IP_3/VREF_3,3,VREF,,H,8,4
+H5,VCCO_3,3,VCCO,,H,8,5
+H6,IO_L10N_3,3,I/O,TRUE,H,8,6
+H7,IO_L03N_3,3,I/O,TRUE,H,8,7
+H8,GND,GND,GND,,H,8,8
+H9,IO_L47N_0,0,I/O,TRUE,H,8,9
+H10,IO_L46N_0,0,I/O,TRUE,H,8,10
+H11,VCCO_0,0,VCCO,,H,8,11
+H12,IO_L35N_0,0,I/O,TRUE,H,8,12
+H13,IP_0,0,INPUT,,H,8,13
+H14,GND,GND,GND,,H,8,14
+H15,IO_L16N_0,0,I/O,TRUE,H,8,15
+H16,VCCO_0,0,VCCO,,H,8,16
+H17,IO_L08P_0,0,I/O,TRUE,H,8,17
+H18,IP_0,0,INPUT,,H,8,18
+H19,GND,GND,GND,,H,8,19
+H20,IO_L64P_1/A24,1,DUAL,TRUE,H,8,20
+H21,IO_L62N_1/A21,1,DUAL,TRUE,H,8,21
+H22,VCCO_1,1,VCCO,,H,8,22
+H23,VCCAUX,VCCAUX,VCCAUX,,H,8,23
+H24,IP_1,1,INPUT,,H,8,24
+H25,VCCO_1,1,VCCO,,H,8,25
+H26,IP_1/VREF_1,1,VREF,,H,8,26
+J1,IP_L24P_3,3,INPUT,TRUE,J,9,1
+J2,IP_L20N_3/VREF_3,3,VREF,TRUE,J,9,2
+J3,IP_L20P_3,3,INPUT,TRUE,J,9,3
+J4,IO_L19N_3,3,I/O,TRUE,J,9,4
+J5,IO_L19P_3,3,I/O,TRUE,J,9,5
+J6,IO_L13N_3,3,I/O,TRUE,J,9,6
+J7,IO_L10P_3,3,I/O,TRUE,J,9,7
+J8,IO_L01P_3,3,I/O,TRUE,J,9,8
+J9,IO_L01N_3,3,I/O,TRUE,J,9,9
+J10,IP_0,0,INPUT,,J,9,10
+J11,IO_L43P_0,0,I/O,TRUE,J,9,11
+J12,IO_L39P_0,0,I/O,TRUE,J,9,12
+J13,IP_0,0,INPUT,,J,9,13
+J14,IO_L25N_0/GCLK5,0,GCLK,TRUE,J,9,14
+J15,IP_0,0,INPUT,,J,9,15
+J16,IO_L12P_0,0,I/O,TRUE,J,9,16
+J17,IP_0/VREF_0,0,VREF,,J,9,17
+J18,VCCAUX,VCCAUX,VCCAUX,,J,9,18
+J19,IO_L59P_1,1,I/O,TRUE,J,9,19
+J20,IO_L59N_1,1,I/O,TRUE,J,9,20
+J21,IO_L62P_1/A20,1,DUAL,TRUE,J,9,21
+J22,IO_L49N_1,1,I/O,TRUE,J,9,22
+J23,IO_L49P_1,1,I/O,TRUE,J,9,23
+J24,GND,GND,GND,,J,9,24
+J25,IO_L43N_1/A19,1,DUAL,TRUE,J,9,25
+J26,IO_L43P_1/A18,1,DUAL,TRUE,J,9,26
+K1,IP_L24N_3,3,INPUT,TRUE,K,10,1
+K2,IO_L23N_3,3,I/O,TRUE,K,10,2
+K3,IO_L23P_3,3,I/O,TRUE,K,10,3
+K4,IO_L22N_3,3,I/O,TRUE,K,10,4
+K5,IO_L22P_3,3,I/O,TRUE,K,10,5
+K6,IO_L18P_3,3,I/O,TRUE,K,10,6
+K7,IO_L13P_3,3,I/O,TRUE,K,10,7
+K8,IO_L05N_3,3,I/O,TRUE,K,10,8
+K9,IO_L05P_3,3,I/O,TRUE,K,10,9
+K10,GND,GND,GND,,K,10,10
+K11,IO_L43N_0,0,I/O,TRUE,K,10,11
+K12,IO_L39N_0,0,I/O,TRUE,K,10,12
+K13,VCCAUX,VCCAUX,VCCAUX,,K,10,13
+K14,IO_L25P_0/GCLK4,0,GCLK,TRUE,K,10,14
+K15,VCCINT,VCCINT,VCCINT,,K,10,15
+K16,IO_L12N_0,0,I/O,TRUE,K,10,16
+K17,GND,GND,GND,,K,10,17
+K18,IO_L57N_1,1,I/O,TRUE,K,10,18
+K19,IO_L57P_1,1,I/O,TRUE,K,10,19
+K20,IO_L53N_1,1,I/O,TRUE,K,10,20
+K21,IO_L50N_1,1,I/O,TRUE,K,10,21
+K22,IO_L46N_1,1,I/O,TRUE,K,10,22
+K23,IO_L46P_1,1,I/O,TRUE,K,10,23
+K24,IP_L40P_1,1,INPUT,TRUE,K,10,24
+K25,IO_L41P_1,1,I/O,TRUE,K,10,25
+K26,IO_L41N_1,1,I/O,TRUE,K,10,26
+L1,GND,GND,GND,,L,11,1
+L2,VCCO_3,3,VCCO,,L,11,2
+L3,IO_L25N_3,3,I/O,TRUE,L,11,3
+L4,IO_L25P_3,3,I/O,TRUE,L,11,4
+L5,VCCAUX,VCCAUX,VCCAUX,,L,11,5
+L6,GND,GND,GND,,L,11,6
+L7,IO_L18N_3,3,I/O,TRUE,L,11,7
+L8,VCCO_3,3,VCCO,,L,11,8
+L9,IO_L15N_3,3,I/O,TRUE,L,11,9
+L10,IO_L15P_3,3,I/O,TRUE,L,11,10
+L11,GND,GND,GND,,L,11,11
+L12,VCCINT,VCCINT,VCCINT,,L,11,12
+L13,GND,GND,GND,,L,11,13
+L14,VCCINT,VCCINT,VCCINT,,L,11,14
+L15,GND,GND,GND,,L,11,15
+L16,VCCINT,VCCINT,VCCINT,,L,11,16
+L17,IO_L55N_1,1,I/O,TRUE,L,11,17
+L18,IO_L55P_1,1,I/O,TRUE,L,11,18
+L19,VCCO_1,1,VCCO,,L,11,19
+L20,IO_L53P_1,1,I/O,TRUE,L,11,20
+L21,GND,GND,GND,,L,11,21
+L22,IO_L50P_1,1,I/O,TRUE,L,11,22
+L23,IP_L40N_1,1,INPUT,TRUE,L,11,23
+L24,IO_L38P_1/A12,1,DUAL,TRUE,L,11,24
+L25,VCCO_1,1,VCCO,,L,11,25
+L26,GND,GND,GND,,L,11,26
+M1,IO_L29N_3/VREF_3,3,VREF,TRUE,M,12,1
+M2,IO_L29P_3,3,I/O,TRUE,M,12,2
+M3,IO_L27N_3,3,I/O,TRUE,M,12,3
+M4,IO_L27P_3,3,I/O,TRUE,M,12,4
+M5,IO_L28P_3,3,I/O,TRUE,M,12,5
+M6,IO_L28N_3,3,I/O,TRUE,M,12,6
+M7,IO_L26N_3,3,I/O,TRUE,M,12,7
+M8,IO_L26P_3,3,I/O,TRUE,M,12,8
+M9,IO_L21N_3,3,I/O,TRUE,M,12,9
+M10,IO_L21P_3,3,I/O,TRUE,M,12,10
+M11,VCCINT,VCCINT,VCCINT,,M,12,11
+M12,GND,GND,GND,,M,12,12
+M13,VCCINT,VCCINT,VCCINT,,M,12,13
+M14,GND,GND,GND,,M,12,14
+M15,VCCINT,VCCINT,VCCINT,,M,12,15
+M16,GND,GND,GND,,M,12,16
+M17,VCCINT,VCCINT,VCCINT,,M,12,17
+M18,IO_L47N_1,1,I/O,TRUE,M,12,18
+M19,IO_L47P_1,1,I/O,TRUE,M,12,19
+M20,IO_L42N_1/A17,1,DUAL,TRUE,M,12,20
+M21,IO_L45P_1,1,I/O,TRUE,M,12,21
+M22,IO_L45N_1,1,I/O,TRUE,M,12,22
+M23,IO_L38N_1/A13,1,DUAL,TRUE,M,12,23
+M24,IP_L36P_1/VREF_1,1,VREF,TRUE,M,12,24
+M25,IO_L35N_1/A11,1,DUAL,TRUE,M,12,25
+M26,IO_L35P_1/A10,1,DUAL,TRUE,M,12,26
+N1,IO_L31P_3,3,I/O,TRUE,N,13,1
+N2,IO_L31N_3,3,I/O,TRUE,N,13,2
+N3,GND,GND,GND,,N,13,3
+N4,IO_L30N_3,3,I/O,TRUE,N,13,4
+N5,IO_L30P_3,3,I/O,TRUE,N,13,5
+N6,IO_L32P_3/LHCLK0,3,LHCLK,TRUE,N,13,6
+N7,IO_L32N_3/LHCLK1,3,LHCLK,TRUE,N,13,7
+N8,GND,GND,GND,,N,13,8
+N9,IO_L35P_3/TRDY2/LHCLK6,3,LHCLK,TRUE,N,13,9
+N10,VCCAUX,VCCAUX,VCCAUX,,N,13,10
+N11,GND,GND,GND,,N,13,11
+N12,VCCINT,VCCINT,VCCINT,,N,13,12
+N13,VCCINT,VCCINT,VCCINT,,N,13,13
+N14,VCCINT,VCCINT,VCCINT,,N,13,14
+N15,GND,GND,GND,,N,13,15
+N16,VCCINT,VCCINT,VCCINT,,N,13,16
+N17,IO_L39N_1/A15,1,DUAL,TRUE,N,13,17
+N18,IO_L39P_1/A14,1,DUAL,TRUE,N,13,18
+N19,IO_L34N_1/RHCLK7,1,RHCLK,TRUE,N,13,19
+N20,IO_L42P_1/A16,1,DUAL,TRUE,N,13,20
+N21,IO_L37N_1,1,I/O,TRUE,N,13,21
+N22,VCCO_1,1,VCCO,,N,13,22
+N23,IP_L36N_1,1,INPUT,TRUE,N,13,23
+N24,IO_L33N_1/RHCLK5,1,RHCLK,TRUE,N,13,24
+N25,IP_L32N_1,1,INPUT,TRUE,N,13,25
+N26,IP_L32P_1,1,INPUT,TRUE,N,13,26
+P1,IO_L33P_3/LHCLK2,3,LHCLK,TRUE,P,14,1
+P2,IO_L33N_3/IRDY2/LHCLK3,3,LHCLK,TRUE,P,14,2
+P3,IO_L34N_3/LHCLK5,3,LHCLK,TRUE,P,14,3
+P4,IO_L34P_3/LHCLK4,3,LHCLK,TRUE,P,14,4
+P5,VCCO_3,3,VCCO,,P,14,5
+P6,IO_L39N_3,3,I/O,TRUE,P,14,6
+P7,IO_L39P_3,3,I/O,TRUE,P,14,7
+P8,IO_L41P_3,3,I/O,TRUE,P,14,8
+P9,IO_L41N_3,3,I/O,TRUE,P,14,9
+P10,IO_L35N_3/LHCLK7,3,LHCLK,TRUE,P,14,10
+P11,VCCINT,VCCINT,VCCINT,,P,14,11
+P12,GND,GND,GND,,P,14,12
+P13,VCCINT,VCCINT,VCCINT,,P,14,13
+P14,VCCINT,VCCINT,VCCINT,,P,14,14
+P15,VCCINT,VCCINT,VCCINT,,P,14,15
+P16,GND,GND,GND,,P,14,16
+P17,VCCAUX,VCCAUX,VCCAUX,,P,14,17
+P18,IO_L34P_1/IRDY1/RHCLK6,1,RHCLK,TRUE,P,14,18
+P19,GND,GND,GND,,P,14,19
+P20,IO_L30N_1/RHCLK1,1,RHCLK,TRUE,P,14,20
+P21,IO_L30P_1/RHCLK0,1,RHCLK,TRUE,P,14,21
+P22,IO_L37P_1,1,I/O,TRUE,P,14,22
+P23,IO_L33P_1/RHCLK4,1,RHCLK,TRUE,P,14,23
+P24,GND,GND,GND,,P,14,24
+P25,IO_L31N_1/TRDY1/RHCLK3,1,RHCLK,TRUE,P,14,25
+P26,IO_L31P_1/RHCLK2,1,RHCLK,TRUE,P,14,26
+R1,IO_L36P_3/VREF_3,3,VREF,TRUE,R,15,1
+R2,IO_L36N_3,3,I/O,TRUE,R,15,2
+R3,IO_L37P_3,3,I/O,TRUE,R,15,3
+R4,IO_L37N_3,3,I/O,TRUE,R,15,4
+R5,IO_L40P_3,3,I/O,TRUE,R,15,5
+R6,IO_L40N_3,3,I/O,TRUE,R,15,6
+R7,IO_L45N_3,3,I/O,TRUE,R,15,7
+R8,IO_L45P_3,3,I/O,TRUE,R,15,8
+R9,IO_L43N_3,3,I/O,TRUE,R,15,9
+R10,IO_L43P_3/VREF_3,3,VREF,TRUE,R,15,10
+R11,GND,GND,GND,,R,15,11
+R12,VCCINT,VCCINT,VCCINT,,R,15,12
+R13,GND,GND,GND,,R,15,13
+R14,VCCINT,VCCINT,VCCINT,,R,15,14
+R15,GND,GND,GND,,R,15,15
+R16,VCCINT,VCCINT,VCCINT,,R,15,16
+R17,IO_L27N_1/A7,1,DUAL,TRUE,R,15,17
+R18,IO_L27P_1/A6,1,DUAL,TRUE,R,15,18
+R19,IO_L22P_1,1,I/O,TRUE,R,15,19
+R20,IO_L22N_1,1,I/O,TRUE,R,15,20
+R21,IO_L25P_1/A2,1,DUAL,TRUE,R,15,21
+R22,IO_L25N_1/A3,1,DUAL,TRUE,R,15,22
+R23,IP_L28P_1/VREF_1,1,VREF,TRUE,R,15,23
+R24,IP_L28N_1,1,INPUT,TRUE,R,15,24
+R25,IO_L29P_1/A8,1,DUAL,TRUE,R,15,25
+R26,IO_L29N_1/A9,1,DUAL,TRUE,R,15,26
+T1,GND,GND,GND,,T,16,1
+T2,VCCO_3,3,VCCO,,T,16,2
+T3,IO_L38P_3,3,I/O,TRUE,T,16,3
+T4,IO_L38N_3,3,I/O,TRUE,T,16,4
+T5,IO_L42P_3,3,I/O,TRUE,T,16,5
+T6,GND,GND,GND,,T,16,6
+T7,IO_L51P_3,3,I/O,TRUE,T,16,7
+T8,VCCO_3,3,VCCO,,T,16,8
+T9,IO_L48N_3,3,I/O,TRUE,T,16,9
+T10,IO_L48P_3,3,I/O,TRUE,T,16,10
+T11,VCCINT,VCCINT,VCCINT,,T,16,11
+T12,GND,GND,GND,,T,16,12
+T13,VCCINT,VCCINT,VCCINT,,T,16,13
+T14,GND,GND,GND,,T,16,14
+T15,VCCINT,VCCINT,VCCINT,,T,16,15
+T16,GND,GND,GND,,T,16,16
+T17,IO_L17N_1,1,I/O,TRUE,T,16,17
+T18,IO_L17P_1,1,I/O,TRUE,T,16,18
+T19,VCCO_1,1,VCCO,,T,16,19
+T20,IO_L14N_1,1,I/O,TRUE,T,16,20
+T21,GND,GND,GND,,T,16,21
+T22,VCCAUX,VCCAUX,VCCAUX,,T,16,22
+T23,IO_L26P_1/A4,1,DUAL,TRUE,T,16,23
+T24,IO_L26N_1/A5,1,DUAL,TRUE,T,16,24
+T25,VCCO_1,1,VCCO,,T,16,25
+T26,GND,GND,GND,,T,16,26
+U1,IO_L44P_3,3,I/O,TRUE,U,17,1
+U2,IO_L44N_3,3,I/O,TRUE,U,17,2
+U3,IP_L46P_3,3,INPUT,TRUE,U,17,3
+U4,IO_L42N_3,3,I/O,TRUE,U,17,4
+U5,IO_L49P_3,3,I/O,TRUE,U,17,5
+U6,IO_L51N_3,3,I/O,TRUE,U,17,6
+U7,IO_L56P_3,3,I/O,TRUE,U,17,7
+U8,IO_L56N_3,3,I/O,TRUE,U,17,8
+U9,IO_L61P_3,3,I/O,TRUE,U,17,9
+U10,GND,GND,GND,,U,17,10
+U11,IO_L13N_2,2,I/O,TRUE,U,17,11
+U12,VCCINT,VCCINT,VCCINT,,U,17,12
+U13,GND,GND,GND,,U,17,13
+U14,VCCAUX,VCCAUX,VCCAUX,,U,17,14
+U15,IO_L35N_2,2,I/O,TRUE,U,17,15
+U16,IO_L42N_2,2,I/O,TRUE,U,17,16
+U17,GND,GND,GND,,U,17,17
+U18,IO_L12N_1,1,I/O,TRUE,U,17,18
+U19,IO_L12P_1,1,I/O,TRUE,U,17,19
+U20,IO_L10N_1,1,I/O,TRUE,U,17,20
+U21,IO_L14P_1,1,I/O,TRUE,U,17,21
+U22,IO_L21N_1,1,I/O,TRUE,U,17,22
+U23,IO_L23P_1,1,I/O,TRUE,U,17,23
+U24,IO_L23N_1/VREF_1,1,VREF,TRUE,U,17,24
+U25,GND,GND,GND,,U,17,25
+U26,IP_1/VREF_1,1,VREF,,U,17,26
+V1,IO_L47P_3,3,I/O,TRUE,V,18,1
+V2,IO_L47N_3,3,I/O,TRUE,V,18,2
+V3,GND,GND,GND,,V,18,3
+V4,IP_L46N_3,3,INPUT,TRUE,V,18,4
+V5,IO_L49N_3,3,I/O,TRUE,V,18,5
+V6,IO_L59N_3,3,I/O,TRUE,V,18,6
+V7,IO_L59P_3,3,I/O,TRUE,V,18,7
+V8,IO_L61N_3,3,I/O,TRUE,V,18,8
+V9,VCCAUX,VCCAUX,VCCAUX,,V,18,9
+V10,IO_L09P_2,2,I/O,TRUE,V,18,10
+V11,IO_L13P_2,2,I/O,TRUE,V,18,11
+V12,IO_L16P_2,2,I/O,TRUE,V,18,12
+V13,IO_L20P_2,2,I/O,TRUE,V,18,13
+V14,IO_L31P_2,2,I/O,TRUE,V,18,14
+V15,IO_L35P_2,2,I/O,TRUE,V,18,15
+V16,IO_L42P_2,2,I/O,TRUE,V,18,16
+V17,IO_L46N_2,2,I/O,TRUE,V,18,17
+V18,IO_L08P_1,1,I/O,TRUE,V,18,18
+V19,IO_L08N_1,1,I/O,TRUE,V,18,19
+V20,SUSPEND,1,PWRMGMT,,V,18,20
+V21,IO_L10P_1,1,I/O,TRUE,V,18,21
+V22,IO_L18N_1,1,I/O,TRUE,V,18,22
+V23,IO_L21P_1,1,I/O,TRUE,V,18,23
+V24,IO_L19P_1,1,I/O,TRUE,V,18,24
+V25,IO_L19N_1,1,I/O,TRUE,V,18,25
+V26,IP_1/VREF_1,1,VREF,,V,18,26
+W1,IP_L50P_3,3,INPUT,TRUE,W,19,1
+W2,IP_L50N_3/VREF_3,3,VREF,TRUE,W,19,2
+W3,IO_L52P_3,3,I/O,TRUE,W,19,3
+W4,IO_L52N_3,3,I/O,TRUE,W,19,4
+W5,VCCO_3,3,VCCO,,W,19,5
+W6,IO_L63N_3,3,I/O,TRUE,W,19,6
+W7,IO_L63P_3,3,I/O,TRUE,W,19,7
+W8,GND,GND,GND,,W,19,8
+W9,IO_L05P_2,2,I/O,TRUE,W,19,9
+W10,IO_L09N_2,2,I/O,TRUE,W,19,10
+W11,VCCO_2,2,VCCO,,W,19,11
+W12,IO_L16N_2,2,I/O,TRUE,W,19,12
+W13,IO_L20N_2,2,I/O,TRUE,W,19,13
+W14,GND,GND,GND,,W,19,14
+W15,IO_L31N_2,2,I/O,TRUE,W,19,15
+W16,VCCO_2,2,VCCO,,W,19,16
+W17,IO_L46P_2,2,I/O,TRUE,W,19,17
+W18,VCCINT,VCCINT,VCCINT,,W,19,18
+W19,GND,GND,GND,,W,19,19
+W20,IO_L04P_1,1,I/O,TRUE,W,19,20
+W21,IO_L04N_1,1,I/O,TRUE,W,19,21
+W22,VCCO_1,1,VCCO,,W,19,22
+W23,IO_L18P_1,1,I/O,TRUE,W,19,23
+W24,GND,GND,GND,,W,19,24
+W25,GND,GND,GND,,W,19,25
+W26,VCCAUX,VCCAUX,VCCAUX,,W,19,26
+Y1,IO_L53P_3,3,I/O,TRUE,Y,20,1
+Y2,IO_L53N_3,3,I/O,TRUE,Y,20,2
+Y3,IP_3,3,INPUT,,Y,20,3
+Y4,VCCINT,VCCINT,VCCINT,,Y,20,4
+Y5,IO_L57P_3,3,I/O,TRUE,Y,20,5
+Y6,IO_L57N_3,3,I/O,TRUE,Y,20,6
+Y7,IO_L02P_2/M2,2,DUAL,TRUE,Y,20,7
+Y8,VCCINT,VCCINT,VCCINT,,Y,20,8
+Y9,IO_L05N_2,2,I/O,TRUE,Y,20,9
+Y10,IO_L12P_2,2,I/O,TRUE,Y,20,10
+Y11,VCCINT,VCCINT,VCCINT,,Y,20,11
+Y12,IO_L17P_2/RDWR_B,2,DUAL,TRUE,Y,20,12
+Y13,IO_L25N_2/GCLK13,2,GCLK,TRUE,Y,20,13
+Y14,IO_L27P_2/GCLK0,2,GCLK,TRUE,Y,20,14
+Y15,IO_L34N_2/D3,2,DUAL,TRUE,Y,20,15
+Y16,IP_2/VREF_2,2,VREF,,Y,20,16
+Y17,IO_L43N_2,2,I/O,TRUE,Y,20,17
+Y18,VCCINT,VCCINT,VCCINT,,Y,20,18
+Y19,VCCINT,VCCINT,VCCINT,,Y,20,19
+Y20,IO_L01P_1/HDC,1,DUAL,TRUE,Y,20,20
+Y21,IO_L01N_1/LDC2,1,DUAL,TRUE,Y,20,21
+Y22,IO_L13P_1,1,I/O,TRUE,Y,20,22
+Y23,IO_L13N_1,1,I/O,TRUE,Y,20,23
+Y24,IO_L15P_1,1,I/O,TRUE,Y,20,24
+Y25,IO_L15N_1,1,I/O,TRUE,Y,20,25
+Y26,IP_1,1,INPUT,,Y,20,26

Added: usrp-hw/trunk/sym/xilinx/ff1136_big.txt
===================================================================
--- usrp-hw/trunk/sym/xilinx/ff1136_big.txt                             (rev 0)
+++ usrp-hw/trunk/sym/xilinx/ff1136_big.txt     2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,1141 @@
+Device/Package 5vfx100tff1136 Mon Jan  8 14:04:54 2007 
+                
+W18    0       DXP_0 
+W17    0       DXN_0 
+T18    0       AVDD_0 
+T17    0       AVSS_0 
+U18    0       VP_0 
+V17    0       VN_0 
+V18    0       VREFP_0 
+U17    0       VREFN_0 
+L23    0       VBATT_0 
+M22    0       PROGRAM_B_0 
+M23    0       HSWAPEN_0 
+P15    0       D_IN_0 
+M15    0       DONE_0 
+N15    0       CCLK_0 
+N14    0       INIT_B_0 
+N22    0       CS_B_0 
+N23    0       RDWR_B_0 
+AB23   0       RSVD 
+AC23   0       RSVD 
+AB15   0       TCK_0 
+AD21   0       M0_0 
+AD22   0       M2_0 
+AC22   0       M1_0 
+AC14   0       TMS_0 
+AC15   0       TDI_0 
+AD15   0       D_OUT_BUSY_0 
+AD14   0       TDO_0 
+L21    1       IO_L0P_A19_1 
+L20    1       IO_L0N_A18_1 
+L15    1       IO_L1P_A17_1 
+L16    1       IO_L1N_A16_1 
+J22    1       IO_L2P_A15_D31_1 
+K21    1       IO_L2N_A14_D30_1 
+K16    1       IO_L3P_A13_D29_1 
+J15    1       IO_L3N_A12_D28_1 
+G22    1       IO_L4P_A11_D27_1 
+H22    1       IO_L4N_VREF_A10_D26_1 
+L14    1       IO_L5P_A9_D25_1 
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+AJ26   21      IO_L11N_CC_21 
+AJ25   21      IO_L12P_VRN_21 
+AH25   21      IO_L12N_VRP_21 
+AF24   21      IO_L13P_21 
+AG25   21      IO_L13N_21 
+AG27   21      IO_L14P_21 
+AG26   21      IO_L14N_VREF_21 
+AF25   21      IO_L15P_21 
+AF26   21      IO_L15N_21 
+AE27   21      IO_L16P_21 
+AE26   21      IO_L16N_21 
+AC25   21      IO_L17P_21 
+AC24   21      IO_L17N_21 
+AD26   21      IO_L18P_21 
+AD25   21      IO_L18N_21 
+AD24   21      IO_L19P_21 
+AE24   21      IO_L19N_21 
+AN14   22      IO_L0P_22 
+AP14   22      IO_L0N_22 
+AB10   22      IO_L1P_22 
+AA10   22      IO_L1N_22 
+AN13   22      IO_L2P_22 
+AM13   22      IO_L2N_22 
+AA8    22      IO_L3P_22 
+AA9    22      IO_L3N_22 
+AP12   22      IO_L4P_22 
+AN12   22      IO_L4N_VREF_22 
+AC8    22      IO_L5P_22 
+AB8    22      IO_L5N_22 
+AM12   22      IO_L6P_22 
+AM11   22      IO_L6N_22 
+AC10   22      IO_L7P_22 
+AC9    22      IO_L7N_22 
+AL11   22      IO_L8P_CC_22 
+AL10   22      IO_L8N_CC_22 
+AE8    22      IO_L9P_CC_22 
+AD9    22      IO_L9N_CC_22 
+AD10   22      IO_L10P_CC_22 
+AD11   22      IO_L10N_CC_22 
+AK11   22      IO_L11P_CC_22 
+AJ11   22      IO_L11N_CC_22 
+AF8    22      IO_L12P_VRN_22 
+AE9    22      IO_L12N_VRP_22 
+AK8    22      IO_L13P_22 
+AK9    22      IO_L13N_22 
+AF9    22      IO_L14P_22 
+AF10   22      IO_L14N_VREF_22 
+AJ9    22      IO_L15P_22 
+AJ10   22      IO_L15N_22 
+AF11   22      IO_L16P_22 
+AE11   22      IO_L16N_22 
+AH9    22      IO_L17P_22 
+AH10   22      IO_L17N_22 
+AG8    22      IO_L18P_22 
+AH8    22      IO_L18N_22 
+AG10   22      IO_L19P_22 
+AG11   22      IO_L19N_22 
+C20    23      IO_L0P_23 
+B20    23      IO_L0N_23 
+B21    23      IO_L1P_23 
+A21    23      IO_L1N_23 
+C19    23      IO_L2P_23 
+C18    23      IO_L2N_23 
+C22    23      IO_L3P_23 
+B22    23      IO_L3N_23 
+B18    23      IO_L4P_23 
+A18    23      IO_L4N_VREF_23 
+C23    23      IO_L5P_23 
+B23    23      IO_L5N_23 
+A19    23      IO_L6P_23 
+A20    23      IO_L6N_23 
+A23    23      IO_L7P_23 
+A24    23      IO_L7N_23 
+C24    23      IO_L8P_CC_23 
+D25    23      IO_L8N_CC_23 
+B26    23      IO_L9P_CC_23 
+A25    23      IO_L9N_CC_23 
+B27    23      IO_L10P_CC_23 
+A26    23      IO_L10N_CC_23 
+B25    23      IO_L11P_CC_23 
+C25    23      IO_L11N_CC_23 
+C29    23      IO_L12P_VRN_23 
+B28    23      IO_L12N_VRP_23 
+D26    23      IO_L13P_23 
+C27    23      IO_L13N_23 
+A29    23      IO_L14P_23 
+A28    23      IO_L14N_VREF_23 
+C28    23      IO_L15P_23 
+D27    23      IO_L15N_23 
+B31    23      IO_L16P_23 
+A31    23      IO_L16N_23 
+C30    23      IO_L17P_23 
+D29    23      IO_L17N_23 
+D31    23      IO_L18P_23 
+D30    23      IO_L18N_23 
+A30    23      IO_L19P_23 
+B30    23      IO_L19N_23 
+AL29   25      IO_L0P_25 
+AL30   25      IO_L0N_25 
+AM31   25      IO_L1P_25 
+AL31   25      IO_L1N_25 
+AN30   25      IO_L2P_25 
+AM30   25      IO_L2N_25 
+AP30   25      IO_L3P_25 
+AP31   25      IO_L3N_25 
+AM27   25      IO_L4P_25 
+AL28   25      IO_L4N_VREF_25 
+AP29   25      IO_L5P_25 
+AN29   25      IO_L5N_25 
+AP27   25      IO_L6P_25 
+AN27   25      IO_L6N_25 
+AN28   25      IO_L7P_25 
+AM28   25      IO_L7N_25 
+AN25   25      IO_L8P_CC_25 
+AM25   25      IO_L8N_CC_25 
+AM26   25      IO_L9P_CC_25 
+AL26   25      IO_L9N_CC_25 
+AP26   25      IO_L10P_CC_25 
+AP25   25      IO_L10N_CC_25 
+AL25   25      IO_L11P_CC_25 
+AL24   25      IO_L11N_CC_25 
+AN24   25      IO_L12P_VRN_25 
+AP24   25      IO_L12N_VRP_25 
+AM21   25      IO_L13P_25 
+AM20   25      IO_L13N_25 
+AN23   25      IO_L14P_25 
+AM23   25      IO_L14N_VREF_25 
+AN20   25      IO_L15P_25 
+AP20   25      IO_L15N_25 
+AN22   25      IO_L16P_25 
+AM22   25      IO_L16N_25 
+AN18   25      IO_L17P_25 
+AM18   25      IO_L17N_25 
+AP22   25      IO_L18P_25 
+AP21   25      IO_L18N_25 
+AN19   25      IO_L19P_25 
+AP19   25      IO_L19N_25 
+M2     NA      MGTTXP0_112 
+M3     NA      MGTAVTTTX_112 
+N2     NA      MGTTXN0_112 
+N1     NA      MGTRXP0_112 
+N3     NA      MGTAVTTRX_112 
+P1     NA      MGTRXN0_112 
+T3     NA      MGTAVCCPLL_112 
+R1     NA      MGTRXN1_112 
+P3     NA      MGTREFCLKN_112 
+T1     NA      MGTRXP1_112 
+P4     NA      MGTREFCLKP_112 
+T2     NA      MGTTXN1_112 
+U3     NA      MGTAVTTTX_112 
+U2     NA      MGTTXP1_112 
+V5     NA      MGTAVTTRXC 
+V4     NA      MGTRREF_112 
+U5     NOPAD/UNCONNECTED        
+U4     NOPAD/UNCONNECTED        
+V2     NA      MGTTXP0_114 
+AC3    NA      MGTAVTTTX_114 
+W2     NA      MGTTXN0_114 
+W1     NA      MGTRXP0_114 
+W3     NA      MGTAVTTRX_114 
+Y1     NA      MGTRXN0_114 
+AB3    NA      MGTAVCCPLL_114 
+AA1    NA      MGTRXN1_114 
+Y3     NA      MGTREFCLKN_114 
+AB1    NA      MGTRXP1_114 
+Y4     NA      MGTREFCLKP_114 
+AB2    NA      MGTTXN1_114 
+V3     NA      MGTAVTTTX_114 
+AC2    NA      MGTTXP1_114 
+F2     NA      MGTTXP0_116 
+F3     NA      MGTAVTTTX_116 
+G2     NA      MGTTXN0_116 
+G1     NA      MGTRXP0_116 
+G3     NA      MGTAVTTRX_116 
+H1     NA      MGTRXN0_116 
+K3     NA      MGTAVCCPLL_116 
+J1     NA      MGTRXN1_116 
+H3     NA      MGTREFCLKN_116 
+K1     NA      MGTRXP1_116 
+H4     NA      MGTREFCLKP_116 
+K2     NA      MGTTXN1_116 
+L3     NA      MGTAVTTTX_116 
+L2     NA      MGTTXP1_116 
+AD2    NA      MGTTXP0_118 
+AD3    NA      MGTAVTTTX_118 
+AE2    NA      MGTTXN0_118 
+AE1    NA      MGTRXP0_118 
+AE3    NA      MGTAVTTRX_118 
+AF1    NA      MGTRXN0_118 
+AH3    NA      MGTAVCCPLL_118 
+AG1    NA      MGTRXN1_118 
+AF3    NA      MGTREFCLKN_118 
+AH1    NA      MGTRXP1_118 
+AF4    NA      MGTREFCLKP_118 
+AH2    NA      MGTTXN1_118 
+AJ3    NA      MGTAVTTTX_118 
+AJ2    NA      MGTTXP1_118 
+B4     NA      MGTTXP0_120 
+C4     NA      MGTAVTTTX_120 
+B3     NA      MGTTXN0_120 
+A3     NA      MGTRXP0_120 
+C3     NA      MGTAVTTRX_120 
+A2     NA      MGTRXN0_120 
+D3     NA      MGTAVCCPLL_120 
+C1     NA      MGTRXN1_120 
+D4     NA      MGTREFCLKN_120 
+D1     NA      MGTRXP1_120 
+E4     NA      MGTREFCLKP_120 
+D2     NA      MGTTXN1_120 
+E3     NA      MGTAVTTTX_120 
+E2     NA      MGTTXP1_120 
+AK2    NA      MGTTXP0_122 
+AK3    NA      MGTAVTTTX_122 
+AL2    NA      MGTTXN0_122 
+AL1    NA      MGTRXP0_122 
+AL3    NA      MGTAVTTRX_122 
+AM1    NA      MGTRXN0_122 
+AM4    NA      MGTAVCCPLL_122 
+AP2    NA      MGTRXN1_122 
+AL4    NA      MGTREFCLKN_122 
+AP3    NA      MGTRXP1_122 
+AL5    NA      MGTREFCLKP_122 
+AN3    NA      MGTTXN1_122 
+AM3    NA      MGTAVTTTX_122 
+AN4    NA      MGTTXP1_122 
+B10    NA      MGTTXP0_124 
+C10    NA      MGTAVTTTX_124 
+B9     NA      MGTTXN0_124 
+A9     NA      MGTRXP0_124 
+C9     NA      MGTAVTTRX_124 
+A8     NA      MGTRXN0_124 
+C6     NA      MGTAVCCPLL_124 
+A7     NA      MGTRXN1_124 
+C8     NA      MGTREFCLKN_124 
+A6     NA      MGTRXP1_124 
+D8     NA      MGTREFCLKP_124 
+B6     NA      MGTTXN1_124 
+C5     NA      MGTAVTTTX_124 
+B5     NA      MGTTXP1_124 
+AN5    NA      MGTTXP0_126 
+AM10   NA      MGTAVTTTX_126 
+AN6    NA      MGTTXN0_126 
+AP6    NA      MGTRXP0_126 
+AM6    NA      MGTAVTTRX_126 
+AP7    NA      MGTRXN0_126 
+AM9    NA      MGTAVCCPLL_126 
+AP8    NA      MGTRXN1_126 
+AM7    NA      MGTREFCLKN_126 
+AP9    NA      MGTRXP1_126 
+AL7    NA      MGTREFCLKP_126 
+AN9    NA      MGTTXN1_126 
+AM5    NA      MGTAVTTTX_126 
+AN10   NA      MGTTXP1_126 
+B1     NA      GND 
+AN1    NA      GND 
+B2     NA      GND 
+C2     NA      GND 
+H2     NA      GND 
+J2     NA      GND 
+P2     NA      GND 
+R2     NA      GND 
+Y2     NA      GND 
+AA2    NA      GND 
+AF2    NA      GND 
+AG2    NA      GND 
+AM2    NA      GND 
+AN2    NA      GND 
+G4     NA      GND 
+K4     NA      GND 
+M4     NA      GND 
+N4     NA      GND 
+T4     NA      GND 
+W4     NA      GND 
+AB4    NA      GND 
+AE4    NA      GND 
+AH4    NA      GND 
+AK4    NA      GND 
+E5     NA      GND 
+K5     NA      GND 
+R5     NA      GND 
+T5     NA      GND 
+W5     NA      GND 
+Y5     NA      GND 
+AE5    NA      GND 
+AJ5    NA      GND 
+D6     NA      GND 
+H6     NA      GND 
+U6     NA      GND 
+V6     NA      GND 
+AH6    NA      GND 
+AL6    NA      GND 
+B7     NA      GND 
+F7     NA      GND 
+L7     NA      GND 
+AA7    NA      GND 
+AN7    NA      GND 
+B8     NA      GND 
+P8     NA      GND 
+AD8    NA      GND 
+AN8    NA      GND 
+D9     NA      GND 
+G9     NA      GND 
+U9     NA      GND 
+AG9    NA      GND 
+AL9    NA      GND 
+K10    NA      GND 
+R10    NA      GND 
+Y10    NA      GND 
+AE10   NA      GND 
+AK10   NA      GND 
+A11    NA      GND 
+B11    NA      GND 
+C11    NA      GND 
+N11    NA      GND 
+U11    NA      GND 
+AA11   NA      GND 
+AC11   NA      GND 
+AN11   NA      GND 
+AP11   NA      GND 
+A12    NA      GND 
+F12    NA      GND 
+M12    NA      GND 
+P12    NA      GND 
+T12    NA      GND 
+V12    NA      GND 
+Y12    NA      GND 
+AB12   NA      GND 
+AD12   NA      GND 
+AF12   NA      GND 
+J13    NA      GND 
+L13    NA      GND 
+N13    NA      GND 
+R13    NA      GND 
+U13    NA      GND 
+W13    NA      GND 
+AA13   NA      GND 
+AC13   NA      GND 
+AJ13   NA      GND 
+AP13   NA      GND 
+B14    NA      GND 
+M14    NA      GND 
+P14    NA      GND 
+T14    NA      GND 
+V14    NA      GND 
+Y14    NA      GND 
+AB14   NA      GND 
+AM14   NA      GND 
+E15    NA      GND 
+K15    NA      GND 
+R15    NA      GND 
+U15    NA      GND 
+W15    NA      GND 
+AA15   NA      GND 
+AE15   NA      GND 
+H16    NA      GND 
+M16    NA      GND 
+P16    NA      GND 
+T16    NA      GND 
+V16    NA      GND 
+Y16    NA      GND 
+AB16   NA      GND 
+AD16   NA      GND 
+AH16   NA      GND 
+A17    NA      GND 
+L17    NA      GND 
+N17    NA      GND 
+R17    NA      GND 
+AA17   NA      GND 
+AC17   NA      GND 
+AF17   NA      GND 
+AL17   NA      GND 
+D18    NA      GND 
+J18    NA      GND 
+M18    NA      GND 
+P18    NA      GND 
+Y18    NA      GND 
+AB18   NA      GND 
+AD18   NA      GND 
+AP18   NA      GND 
+G19    NA      GND 
+N19    NA      GND 
+R19    NA      GND 
+U19    NA      GND 
+W19    NA      GND 
+AA19   NA      GND 
+AC19   NA      GND 
+AG19   NA      GND 
+K20    NA      GND 
+M20    NA      GND 
+P20    NA      GND 
+T20    NA      GND 
+V20    NA      GND 
+Y20    NA      GND 
+AB20   NA      GND 
+AE20   NA      GND 
+AK20   NA      GND 
+C21    NA      GND 
+H21    NA      GND 
+N21    NA      GND 
+R21    NA      GND 
+U21    NA      GND 
+W21    NA      GND 
+AA21   NA      GND 
+AC21   NA      GND 
+AN21   NA      GND 
+A22    NA      GND 
+F22    NA      GND 
+L22    NA      GND 
+P22    NA      GND 
+T22    NA      GND 
+V22    NA      GND 
+Y22    NA      GND 
+AB22   NA      GND 
+AF22   NA      GND 
+J23    NA      GND 
+R23    NA      GND 
+U23    NA      GND 
+W23    NA      GND 
+AA23   NA      GND 
+AJ23   NA      GND 
+AP23   NA      GND 
+B24    NA      GND 
+M24    NA      GND 
+AB24   NA      GND 
+AG24   NA      GND 
+AM24   NA      GND 
+E25    NA      GND 
+K25    NA      GND 
+R25    NA      GND 
+Y25    NA      GND 
+AE25   NA      GND 
+H26    NA      GND 
+N26    NA      GND 
+V26    NA      GND 
+AC26   NA      GND 
+AH26   NA      GND 
+A27    NA      GND 
+L27    NA      GND 
+AA27   NA      GND 
+AF27   NA      GND 
+AL27   NA      GND 
+D28    NA      GND 
+P28    NA      GND 
+AD28   NA      GND 
+AP28   NA      GND 
+B29    NA      GND 
+G29    NA      GND 
+U29    NA      GND 
+AG29   NA      GND 
+K30    NA      GND 
+Y30    NA      GND 
+AK30   NA      GND 
+C31    NA      GND 
+N31    NA      GND 
+AC31   NA      GND 
+AN31   NA      GND 
+A32    NA      GND 
+F32    NA      GND 
+T32    NA      GND 
+AF32   NA      GND 
+D33    NA      GND 
+J33    NA      GND 
+W33    NA      GND 
+AJ33   NA      GND 
+AP33   NA      GND 
+B34    NA      GND 
+G34    NA      GND 
+M34    NA      GND 
+U34    NA      GND 
+AB34   NA      GND 
+AG34   NA      GND 
+AM34   NA      GND 
+M11    NA      VCCAUX 
+P11    NA      VCCAUX 
+V11    NA      VCCAUX 
+AB11   NA      VCCAUX 
+L12    NA      VCCAUX 
+AC12   NA      VCCAUX 
+M21    NA      VCCAUX 
+P23    NA      VCCAUX 
+T23    NA      VCCAUX 
+V23    NA      VCCAUX 
+Y23    NA      VCCAUX 
+U24    NA      VCCAUX 
+N12    NA      VCCINT 
+R12    NA      VCCINT 
+U12    NA      VCCINT 
+W12    NA      VCCINT 
+AA12   NA      VCCINT 
+M13    NA      VCCINT 
+P13    NA      VCCINT 
+T13    NA      VCCINT 
+V13    NA      VCCINT 
+Y13    NA      VCCINT 
+AB13   NA      VCCINT 
+AD13   NA      VCCINT 
+R14    NA      VCCINT 
+U14    NA      VCCINT 
+W14    NA      VCCINT 
+AA14   NA      VCCINT 
+T15    NA      VCCINT 
+V15    NA      VCCINT 
+Y15    NA      VCCINT 
+N16    NA      VCCINT 
+R16    NA      VCCINT 
+U16    NA      VCCINT 
+W16    NA      VCCINT 
+AA16   NA      VCCINT 
+AC16   NA      VCCINT 
+M17    NA      VCCINT 
+P17    NA      VCCINT 
+Y17    NA      VCCINT 
+AB17   NA      VCCINT 
+AD17   NA      VCCINT 
+N18    NA      VCCINT 
+R18    NA      VCCINT 
+AA18   NA      VCCINT 
+AC18   NA      VCCINT 
+M19    NA      VCCINT 
+P19    NA      VCCINT 
+T19    NA      VCCINT 
+V19    NA      VCCINT 
+Y19    NA      VCCINT 
+AB19   NA      VCCINT 
+N20    NA      VCCINT 
+R20    NA      VCCINT 
+U20    NA      VCCINT 
+W20    NA      VCCINT 
+AA20   NA      VCCINT 
+AC20   NA      VCCINT 
+P21    NA      VCCINT 
+T21    NA      VCCINT 
+V21    NA      VCCINT 
+Y21    NA      VCCINT 
+AB21   NA      VCCINT 
+R22    NA      VCCINT 
+U22    NA      VCCINT 
+W22    NA      VCCINT 
+AA22   0       VCCO_0 
+AD23   0       VCCO_0 
+D13    1       VCCO_1 
+G14    1       VCCO_1 
+AM19   2       VCCO_2 
+AH21   2       VCCO_2 
+E20    3       VCCO_3 
+D23    3       VCCO_3 
+AL12   4       VCCO_4 
+AG14   4       VCCO_4 
+C16    5       VCCO_5 
+F17    5       VCCO_5 
+B19    5       VCCO_5 
+AK15   6       VCCO_6 
+AN16   6       VCCO_6 
+AJ18   6       VCCO_6 
+T27    11      VCCO_11 
+R30    11      VCCO_11 
+V31    11      VCCO_11 
+N6     12      VCCO_12 
+T7     12      VCCO_12 
+M9     12      VCCO_12 
+W28    13      VCCO_13 
+AB29   13      VCCO_13 
+AA32   13      VCCO_13 
+M29    15      VCCO_15 
+L32    15      VCCO_15 
+P33    15      VCCO_15 
+AE30   17      VCCO_17 
+AH31   17      VCCO_17 
+AD33   17      VCCO_17 
+AC6    18      VCCO_18 
+W8     18      VCCO_18 
+AB9    18      VCCO_18 
+J28    19      VCCO_19 
+E30    19      VCCO_19 
+H31    19      VCCO_19 
+J8     20      VCCO_20 
+E10    20      VCCO_20 
+H11    20      VCCO_20 
+AJ28   21      VCCO_21 
+AM29   21      VCCO_21 
+AL32   21      VCCO_21 
+AF7    22      VCCO_22 
+AJ8    22      VCCO_22 
+AH11   22      VCCO_22 
+G24    23      VCCO_23 
+C26    23      VCCO_23 
+F27    23      VCCO_23 
+AL22   25      VCCO_25 
+AK25   25      VCCO_25 
+AN26   25      VCCO_25 
+R3     NA      MGTAVCC_112 
+R4     NA      MGTAVCC_112 
+AA3    NA      MGTAVCC_114 
+AA4    NA      MGTAVCC_114 
+J3     NA      MGTAVCC_116 
+J4     NA      MGTAVCC_116 
+AG3    NA      MGTAVCC_118 
+AG4    NA      MGTAVCC_118 
+D5     NA      MGTAVCC_120 
+F4     NA      MGTAVCC_120 
+AJ4    NA      MGTAVCC_122 
+AK5    NA      MGTAVCC_122 
+C7     NA      MGTAVCC_124 
+D7     NA      MGTAVCC_124 
+AL8    NA      MGTAVCC_126 
+AM8    NA      MGTAVCC_126 
+                
+                
+Total Number of Pins generated, 1136

Added: usrp-hw/trunk/sym/xilinx/ff1136_small.txt
===================================================================
--- usrp-hw/trunk/sym/xilinx/ff1136_small.txt                           (rev 0)
+++ usrp-hw/trunk/sym/xilinx/ff1136_small.txt   2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,1141 @@
+Device/Package 5vsx50tff1136 Fri Jun  2 16:05:55 2006 
+                
+W18    0       DXP_0 
+W17    0       DXN_0 
+T18    0       AVDD_0 
+T17    0       AVSS_0 
+U18    0       VP_0 
+V17    0       VN_0 
+V18    0       VREFP_0 
+U17    0       VREFN_0 
+L23    0       VBATT_0 
+M22    0       PROGRAM_B_0 
+M23    0       HSWAPEN_0 
+P15    0       D_IN_0 
+M15    0       DONE_0 
+N15    0       CCLK_0 
+N14    0       INIT_B_0 
+N22    0       CS_B_0 
+N23    0       RDWR_B_0 
+AB23   0       RSVD 
+AC23   0       RSVD 
+AB15   0       TCK_0 
+AD21   0       M0_0 
+AD22   0       M2_0 
+AC22   0       M1_0 
+AC14   0       TMS_0 
+AC15   0       TDI_0 
+AD15   0       D_OUT_BUSY_0 
+AD14   0       TDO_0 
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+AF28   21      IO_L7N_21 
+AK26   21      IO_L8P_CC_21 
+AJ27   21      IO_L8N_CC_21 
+AK29   21      IO_L9P_CC_21 
+AJ29   21      IO_L9N_CC_21 
+AK28   21      IO_L10P_CC_21 
+AK27   21      IO_L10N_CC_21 
+AH27   21      IO_L11P_CC_21 
+AJ26   21      IO_L11N_CC_21 
+AJ25   21      IO_L12P_VRN_21 
+AH25   21      IO_L12N_VRP_21 
+AF24   21      IO_L13P_21 
+AG25   21      IO_L13N_21 
+AG27   21      IO_L14P_21 
+AG26   21      IO_L14N_VREF_21 
+AF25   21      IO_L15P_21 
+AF26   21      IO_L15N_21 
+AE27   21      IO_L16P_21 
+AE26   21      IO_L16N_21 
+AC25   21      IO_L17P_21 
+AC24   21      IO_L17N_21 
+AD26   21      IO_L18P_21 
+AD25   21      IO_L18N_21 
+AD24   21      IO_L19P_21 
+AE24   21      IO_L19N_21 
+AN14   22      IO_L0P_22 
+AP14   22      IO_L0N_22 
+AB10   22      IO_L1P_22 
+AA10   22      IO_L1N_22 
+AN13   22      IO_L2P_22 
+AM13   22      IO_L2N_22 
+AA8    22      IO_L3P_22 
+AA9    22      IO_L3N_22 
+AP12   22      IO_L4P_22 
+AN12   22      IO_L4N_VREF_22 
+AC8    22      IO_L5P_22 
+AB8    22      IO_L5N_22 
+AM12   22      IO_L6P_22 
+AM11   22      IO_L6N_22 
+AC10   22      IO_L7P_22 
+AC9    22      IO_L7N_22 
+AL11   22      IO_L8P_CC_22 
+AL10   22      IO_L8N_CC_22 
+AE8    22      IO_L9P_CC_22 
+AD9    22      IO_L9N_CC_22 
+AD10   22      IO_L10P_CC_22 
+AD11   22      IO_L10N_CC_22 
+AK11   22      IO_L11P_CC_22 
+AJ11   22      IO_L11N_CC_22 
+AF8    22      IO_L12P_VRN_22 
+AE9    22      IO_L12N_VRP_22 
+AK8    22      IO_L13P_22 
+AK9    22      IO_L13N_22 
+AF9    22      IO_L14P_22 
+AF10   22      IO_L14N_VREF_22 
+AJ9    22      IO_L15P_22 
+AJ10   22      IO_L15N_22 
+AF11   22      IO_L16P_22 
+AE11   22      IO_L16N_22 
+AH9    22      IO_L17P_22 
+AH10   22      IO_L17N_22 
+AG8    22      IO_L18P_22 
+AH8    22      IO_L18N_22 
+AG10   22      IO_L19P_22 
+AG11   22      IO_L19N_22 
+C20    NOPAD/UNCONNECTED        
+B20    NOPAD/UNCONNECTED        
+B21    NOPAD/UNCONNECTED        
+A21    NOPAD/UNCONNECTED        
+C19    NOPAD/UNCONNECTED        
+C18    NOPAD/UNCONNECTED        
+C22    NOPAD/UNCONNECTED        
+B22    NOPAD/UNCONNECTED        
+B18    NOPAD/UNCONNECTED        
+A18    NOPAD/UNCONNECTED        
+C23    NOPAD/UNCONNECTED        
+B23    NOPAD/UNCONNECTED        
+A19    NOPAD/UNCONNECTED        
+A20    NOPAD/UNCONNECTED        
+A23    NOPAD/UNCONNECTED        
+A24    NOPAD/UNCONNECTED        
+C24    NOPAD/UNCONNECTED        
+D25    NOPAD/UNCONNECTED        
+B26    NOPAD/UNCONNECTED        
+A25    NOPAD/UNCONNECTED        
+B27    NOPAD/UNCONNECTED        
+A26    NOPAD/UNCONNECTED        
+B25    NOPAD/UNCONNECTED        
+C25    NOPAD/UNCONNECTED        
+C29    NOPAD/UNCONNECTED        
+B28    NOPAD/UNCONNECTED        
+D26    NOPAD/UNCONNECTED        
+C27    NOPAD/UNCONNECTED        
+A29    NOPAD/UNCONNECTED        
+A28    NOPAD/UNCONNECTED        
+C28    NOPAD/UNCONNECTED        
+D27    NOPAD/UNCONNECTED        
+B31    NOPAD/UNCONNECTED        
+A31    NOPAD/UNCONNECTED        
+C30    NOPAD/UNCONNECTED        
+D29    NOPAD/UNCONNECTED        
+D31    NOPAD/UNCONNECTED        
+D30    NOPAD/UNCONNECTED        
+A30    NOPAD/UNCONNECTED        
+B30    NOPAD/UNCONNECTED        
+AL29   NOPAD/UNCONNECTED        
+AL30   NOPAD/UNCONNECTED        
+AM31   NOPAD/UNCONNECTED        
+AL31   NOPAD/UNCONNECTED        
+AN30   NOPAD/UNCONNECTED        
+AM30   NOPAD/UNCONNECTED        
+AP30   NOPAD/UNCONNECTED        
+AP31   NOPAD/UNCONNECTED        
+AM27   NOPAD/UNCONNECTED        
+AL28   NOPAD/UNCONNECTED        
+AP29   NOPAD/UNCONNECTED        
+AN29   NOPAD/UNCONNECTED        
+AP27   NOPAD/UNCONNECTED        
+AN27   NOPAD/UNCONNECTED        
+AN28   NOPAD/UNCONNECTED        
+AM28   NOPAD/UNCONNECTED        
+AN25   NOPAD/UNCONNECTED        
+AM25   NOPAD/UNCONNECTED        
+AM26   NOPAD/UNCONNECTED        
+AL26   NOPAD/UNCONNECTED        
+AP26   NOPAD/UNCONNECTED        
+AP25   NOPAD/UNCONNECTED        
+AL25   NOPAD/UNCONNECTED        
+AL24   NOPAD/UNCONNECTED        
+AN24   NOPAD/UNCONNECTED        
+AP24   NOPAD/UNCONNECTED        
+AM21   NOPAD/UNCONNECTED        
+AM20   NOPAD/UNCONNECTED        
+AN23   NOPAD/UNCONNECTED        
+AM23   NOPAD/UNCONNECTED        
+AN20   NOPAD/UNCONNECTED        
+AP20   NOPAD/UNCONNECTED        
+AN22   NOPAD/UNCONNECTED        
+AM22   NOPAD/UNCONNECTED        
+AN18   NOPAD/UNCONNECTED        
+AM18   NOPAD/UNCONNECTED        
+AP22   NOPAD/UNCONNECTED        
+AP21   NOPAD/UNCONNECTED        
+AN19   NOPAD/UNCONNECTED        
+AP19   NOPAD/UNCONNECTED        
+M2     NA      MGTTXP0_112 
+M3     NA      MGTAVTTTX_112 
+N2     NA      MGTTXN0_112 
+N1     NA      MGTRXP0_112 
+N3     NA      MGTAVTTRX_112 
+P1     NA      MGTRXN0_112 
+T3     NA      MGTAVCCPLL_112 
+R1     NA      MGTRXN1_112 
+P3     NA      MGTREFCLKN_112 
+T1     NA      MGTRXP1_112 
+P4     NA      MGTREFCLKP_112 
+T2     NA      MGTTXN1_112 
+U3     NA      MGTAVTTTX_112 
+U2     NA      MGTTXP1_112 
+V5     NA      MGTAVTTRXC 
+V4     NA      MGTRREF_112 
+U5     NOPAD/UNCONNECTED        
+V2     NA      MGTTXP0_114 
+AC3    NA      MGTAVTTTX_114 
+W2     NA      MGTTXN0_114 
+W1     NA      MGTRXP0_114 
+W3     NA      MGTAVTTRX_114 
+Y1     NA      MGTRXN0_114 
+AB3    NA      MGTAVCCPLL_114 
+AA1    NA      MGTRXN1_114 
+Y3     NA      MGTREFCLKN_114 
+AB1    NA      MGTRXP1_114 
+Y4     NA      MGTREFCLKP_114 
+AB2    NA      MGTTXN1_114 
+V3     NA      MGTAVTTTX_114 
+AC2    NA      MGTTXP1_114 
+F2     NA      MGTTXP0_116 
+F3     NA      MGTAVTTTX_116 
+G2     NA      MGTTXN0_116 
+G1     NA      MGTRXP0_116 
+G3     NA      MGTAVTTRX_116 
+H1     NA      MGTRXN0_116 
+K3     NA      MGTAVCCPLL_116 
+J1     NA      MGTRXN1_116 
+H3     NA      MGTREFCLKN_116 
+K1     NA      MGTRXP1_116 
+H4     NA      MGTREFCLKP_116 
+K2     NA      MGTTXN1_116 
+L3     NA      MGTAVTTTX_116 
+L2     NA      MGTTXP1_116 
+AD2    NA      MGTTXP0_118 
+AD3    NA      MGTAVTTTX_118 
+AE2    NA      MGTTXN0_118 
+AE1    NA      MGTRXP0_118 
+AE3    NA      MGTAVTTRX_118 
+AF1    NA      MGTRXN0_118 
+AH3    NA      MGTAVCCPLL_118 
+AG1    NA      MGTRXN1_118 
+AF3    NA      MGTREFCLKN_118 
+AH1    NA      MGTRXP1_118 
+AF4    NA      MGTREFCLKP_118 
+AH2    NA      MGTTXN1_118 
+AJ3    NA      MGTAVTTTX_118 
+AJ2    NA      MGTTXP1_118 
+B4     NA      MGTTXP0_120 
+C4     NA      MGTAVTTTX_120 
+B3     NA      MGTTXN0_120 
+A3     NA      MGTRXP0_120 
+C3     NA      MGTAVTTRX_120 
+A2     NA      MGTRXN0_120 
+D3     NA      MGTAVCCPLL_120 
+C1     NA      MGTRXN1_120 
+D4     NA      MGTREFCLKN_120 
+D1     NA      MGTRXP1_120 
+E4     NA      MGTREFCLKP_120 
+D2     NA      MGTTXN1_120 
+E3     NA      MGTAVTTTX_120 
+E2     NA      MGTTXP1_120 
+AK2    NA      MGTTXP0_122 
+AK3    NA      MGTAVTTTX_122 
+AL2    NA      MGTTXN0_122 
+AL1    NA      MGTRXP0_122 
+AL3    NA      MGTAVTTRX_122 
+AM1    NA      MGTRXN0_122 
+AM4    NA      MGTAVCCPLL_122 
+AP2    NA      MGTRXN1_122 
+AL4    NA      MGTREFCLKN_122 
+AP3    NA      MGTRXP1_122 
+AL5    NA      MGTREFCLKP_122 
+AN3    NA      MGTTXN1_122 
+AM3    NA      MGTAVTTTX_122 
+AN4    NA      MGTTXP1_122 
+B10    NOPAD/UNCONNECTED        
+C10    NOPAD/UNCONNECTED        
+B9     NOPAD/UNCONNECTED        
+A9     NOPAD/UNCONNECTED        
+C9     NOPAD/UNCONNECTED        
+A8     NOPAD/UNCONNECTED        
+C6     NOPAD/UNCONNECTED        
+A7     NOPAD/UNCONNECTED        
+C8     NOPAD/UNCONNECTED        
+A6     NOPAD/UNCONNECTED        
+D8     NOPAD/UNCONNECTED        
+B6     NOPAD/UNCONNECTED        
+C5     NOPAD/UNCONNECTED        
+B5     NOPAD/UNCONNECTED        
+AN5    NOPAD/UNCONNECTED        
+AM10   NOPAD/UNCONNECTED        
+AN6    NOPAD/UNCONNECTED        
+AP6    NOPAD/UNCONNECTED        
+AM6    NOPAD/UNCONNECTED        
+AP7    NOPAD/UNCONNECTED        
+AM9    NOPAD/UNCONNECTED        
+AP8    NOPAD/UNCONNECTED        
+AM7    NOPAD/UNCONNECTED        
+AP9    NOPAD/UNCONNECTED        
+AL7    NOPAD/UNCONNECTED        
+AN9    NOPAD/UNCONNECTED        
+AM5    NOPAD/UNCONNECTED        
+AN10   NOPAD/UNCONNECTED        
+B1     NA      GND 
+AN1    NA      GND 
+B2     NA      GND 
+C2     NA      GND 
+H2     NA      GND 
+J2     NA      GND 
+P2     NA      GND 
+R2     NA      GND 
+Y2     NA      GND 
+AA2    NA      GND 
+AF2    NA      GND 
+AG2    NA      GND 
+AM2    NA      GND 
+AN2    NA      GND 
+G4     NA      GND 
+K4     NA      GND 
+M4     NA      GND 
+N4     NA      GND 
+T4     NA      GND 
+W4     NA      GND 
+AB4    NA      GND 
+AE4    NA      GND 
+AH4    NA      GND 
+AK4    NA      GND 
+E5     NA      GND 
+K5     NA      GND 
+R5     NA      GND 
+T5     NA      GND 
+W5     NA      GND 
+Y5     NA      GND 
+AE5    NA      GND 
+AJ5    NA      GND 
+D6     NA      GND 
+H6     NA      GND 
+U6     NA      GND 
+V6     NA      GND 
+AH6    NA      GND 
+AL6    NA      GND 
+B7     NA      GND 
+F7     NA      GND 
+L7     NA      GND 
+AA7    NA      GND 
+AN7    NA      GND 
+B8     NA      GND 
+P8     NA      GND 
+AD8    NA      GND 
+AN8    NA      GND 
+D9     NA      GND 
+G9     NA      GND 
+U9     NA      GND 
+AG9    NA      GND 
+AL9    NA      GND 
+K10    NA      GND 
+R10    NA      GND 
+Y10    NA      GND 
+AE10   NA      GND 
+AK10   NA      GND 
+A11    NA      GND 
+B11    NA      GND 
+C11    NA      GND 
+N11    NA      GND 
+U11    NA      GND 
+AA11   NA      GND 
+AC11   NA      GND 
+AN11   NA      GND 
+AP11   NA      GND 
+A12    NA      GND 
+F12    NA      GND 
+M12    NA      GND 
+P12    NA      GND 
+T12    NA      GND 
+V12    NA      GND 
+Y12    NA      GND 
+AB12   NA      GND 
+AD12   NA      GND 
+AF12   NA      GND 
+J13    NA      GND 
+L13    NA      GND 
+N13    NA      GND 
+R13    NA      GND 
+U13    NA      GND 
+W13    NA      GND 
+AA13   NA      GND 
+AC13   NA      GND 
+AJ13   NA      GND 
+AP13   NA      GND 
+B14    NA      GND 
+M14    NA      GND 
+P14    NA      GND 
+T14    NA      GND 
+V14    NA      GND 
+Y14    NA      GND 
+AB14   NA      GND 
+AM14   NA      GND 
+E15    NA      GND 
+K15    NA      GND 
+R15    NA      GND 
+U15    NA      GND 
+W15    NA      GND 
+AA15   NA      GND 
+AE15   NA      GND 
+H16    NA      GND 
+M16    NA      GND 
+P16    NA      GND 
+T16    NA      GND 
+V16    NA      GND 
+Y16    NA      GND 
+AB16   NA      GND 
+AD16   NA      GND 
+AH16   NA      GND 
+A17    NA      GND 
+L17    NA      GND 
+N17    NA      GND 
+R17    NA      GND 
+AA17   NA      GND 
+AC17   NA      GND 
+AF17   NA      GND 
+AL17   NA      GND 
+D18    NA      GND 
+J18    NA      GND 
+M18    NA      GND 
+P18    NA      GND 
+Y18    NA      GND 
+AB18   NA      GND 
+AD18   NA      GND 
+AP18   NA      GND 
+G19    NA      GND 
+N19    NA      GND 
+R19    NA      GND 
+U19    NA      GND 
+W19    NA      GND 
+AA19   NA      GND 
+AC19   NA      GND 
+AG19   NA      GND 
+K20    NA      GND 
+M20    NA      GND 
+P20    NA      GND 
+T20    NA      GND 
+V20    NA      GND 
+Y20    NA      GND 
+AB20   NA      GND 
+AE20   NA      GND 
+AK20   NA      GND 
+C21    NA      GND 
+H21    NA      GND 
+N21    NA      GND 
+R21    NA      GND 
+U21    NA      GND 
+W21    NA      GND 
+AA21   NA      GND 
+AC21   NA      GND 
+AN21   NA      GND 
+A22    NA      GND 
+F22    NA      GND 
+L22    NA      GND 
+P22    NA      GND 
+T22    NA      GND 
+V22    NA      GND 
+Y22    NA      GND 
+AB22   NA      GND 
+AF22   NA      GND 
+J23    NA      GND 
+R23    NA      GND 
+U23    NA      GND 
+W23    NA      GND 
+AA23   NA      GND 
+AJ23   NA      GND 
+AP23   NA      GND 
+B24    NA      GND 
+M24    NA      GND 
+AB24   NA      GND 
+AG24   NA      GND 
+AM24   NA      GND 
+E25    NA      GND 
+K25    NA      GND 
+R25    NA      GND 
+Y25    NA      GND 
+AE25   NA      GND 
+H26    NA      GND 
+N26    NA      GND 
+V26    NA      GND 
+AC26   NA      GND 
+AH26   NA      GND 
+A27    NA      GND 
+L27    NA      GND 
+AA27   NA      GND 
+AF27   NA      GND 
+AL27   NA      GND 
+D28    NA      GND 
+P28    NA      GND 
+AD28   NA      GND 
+AP28   NA      GND 
+B29    NA      GND 
+G29    NA      GND 
+U29    NA      GND 
+AG29   NA      GND 
+K30    NA      GND 
+Y30    NA      GND 
+AK30   NA      GND 
+C31    NA      GND 
+N31    NA      GND 
+AC31   NA      GND 
+AN31   NA      GND 
+A32    NA      GND 
+F32    NA      GND 
+T32    NA      GND 
+AF32   NA      GND 
+D33    NA      GND 
+J33    NA      GND 
+W33    NA      GND 
+AJ33   NA      GND 
+AP33   NA      GND 
+B34    NA      GND 
+G34    NA      GND 
+M34    NA      GND 
+U34    NA      GND 
+AB34   NA      GND 
+AG34   NA      GND 
+AM34   NA      GND 
+M11    NA      VCCAUX 
+P11    NA      VCCAUX 
+V11    NA      VCCAUX 
+AB11   NA      VCCAUX 
+L12    NA      VCCAUX 
+AC12   NA      VCCAUX 
+M21    NA      VCCAUX 
+P23    NA      VCCAUX 
+T23    NA      VCCAUX 
+V23    NA      VCCAUX 
+Y23    NA      VCCAUX 
+U24    NA      VCCAUX 
+N12    NA      VCCINT 
+R12    NA      VCCINT 
+U12    NA      VCCINT 
+W12    NA      VCCINT 
+AA12   NA      VCCINT 
+M13    NA      VCCINT 
+P13    NA      VCCINT 
+T13    NA      VCCINT 
+V13    NA      VCCINT 
+Y13    NA      VCCINT 
+AB13   NA      VCCINT 
+AD13   NA      VCCINT 
+R14    NA      VCCINT 
+U14    NA      VCCINT 
+W14    NA      VCCINT 
+AA14   NA      VCCINT 
+T15    NA      VCCINT 
+V15    NA      VCCINT 
+Y15    NA      VCCINT 
+N16    NA      VCCINT 
+R16    NA      VCCINT 
+U16    NA      VCCINT 
+W16    NA      VCCINT 
+AA16   NA      VCCINT 
+AC16   NA      VCCINT 
+M17    NA      VCCINT 
+P17    NA      VCCINT 
+Y17    NA      VCCINT 
+AB17   NA      VCCINT 
+AD17   NA      VCCINT 
+N18    NA      VCCINT 
+R18    NA      VCCINT 
+AA18   NA      VCCINT 
+AC18   NA      VCCINT 
+M19    NA      VCCINT 
+P19    NA      VCCINT 
+T19    NA      VCCINT 
+V19    NA      VCCINT 
+Y19    NA      VCCINT 
+AB19   NA      VCCINT 
+N20    NA      VCCINT 
+R20    NA      VCCINT 
+U20    NA      VCCINT 
+W20    NA      VCCINT 
+AA20   NA      VCCINT 
+AC20   NA      VCCINT 
+P21    NA      VCCINT 
+T21    NA      VCCINT 
+V21    NA      VCCINT 
+Y21    NA      VCCINT 
+AB21   NA      VCCINT 
+R22    NA      VCCINT 
+U22    NA      VCCINT 
+W22    NA      VCCINT 
+AA22   0       VCCO_0 
+AD23   0       VCCO_0 
+D13    1       VCCO_1 
+G14    1       VCCO_1 
+AM19   2       VCCO_2 
+AH21   2       VCCO_2 
+E20    3       VCCO_3 
+D23    3       VCCO_3 
+AL12   4       VCCO_4 
+AG14   4       VCCO_4 
+C16    5       VCCO_5 
+F17    5       VCCO_5 
+B19    5       VCCO_5 
+AK15   6       VCCO_6 
+AN16   6       VCCO_6 
+AJ18   6       VCCO_6 
+T27    11      VCCO_11 
+R30    11      VCCO_11 
+V31    11      VCCO_11 
+N6     12      VCCO_12 
+T7     12      VCCO_12 
+M9     12      VCCO_12 
+W28    13      VCCO_13 
+AB29   13      VCCO_13 
+AA32   13      VCCO_13 
+M29    15      VCCO_15 
+L32    15      VCCO_15 
+P33    15      VCCO_15 
+AE30   17      VCCO_17 
+AH31   17      VCCO_17 
+AD33   17      VCCO_17 
+AC6    18      VCCO_18 
+W8     18      VCCO_18 
+AB9    18      VCCO_18 
+J28    19      VCCO_19 
+E30    19      VCCO_19 
+H31    19      VCCO_19 
+J8     20      VCCO_20 
+E10    20      VCCO_20 
+H11    20      VCCO_20 
+AJ28   21      VCCO_21 
+AM29   21      VCCO_21 
+AL32   21      VCCO_21 
+AF7    22      VCCO_22 
+AJ8    22      VCCO_22 
+AH11   22      VCCO_22 
+G24    23      VCCO_23 
+C26    23      VCCO_23 
+F27    23      VCCO_23 
+AL22   25      VCCO_25 
+AK25   25      VCCO_25 
+AN26   25      VCCO_25 
+R3     NA      MGTAVCC_112 
+R4     NA      MGTAVCC_112 
+AA3    NA      MGTAVCC_114 
+AA4    NA      MGTAVCC_114 
+J3     NA      MGTAVCC_116 
+J4     NA      MGTAVCC_116 
+AG3    NA      MGTAVCC_118 
+AG4    NA      MGTAVCC_118 
+D5     NA      MGTAVCC_120 
+F4     NA      MGTAVCC_120 
+AJ4    NA      MGTAVCC_122 
+AK5    NA      MGTAVCC_122 
+C7     NOPAD/UNCONNECTED        
+D7     NOPAD/UNCONNECTED        
+AL8    NOPAD/UNCONNECTED        
+AM8    NOPAD/UNCONNECTED        
+U4     NA      FLOAT 
+                
+                
+Total Number of Pins generated, 1136

Copied: usrp-hw/trunk/sym/xilinx/fg320_table.csv (from rev 10171, 
usrp-hw/trunk/sym/generated/fg320_table.csv)
===================================================================
--- usrp-hw/trunk/sym/xilinx/fg320_table.csv                            (rev 0)
+++ usrp-hw/trunk/sym/xilinx/fg320_table.csv    2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,321 @@
+SORT_ROW,SORT_COLUMN,PIN_NUMBER,XC3S400,XC3S400_TYPE,XC3S1000,XC3S1000_TYPE,XC3S1500,XC3S1500_TYPE,BANK
+A,1,A1,GND,GND,GND,GND,GND,GND,N/A
+A,2,A2,IO_L01N_0/VRP_0,DCI,IO_L01N_0/VRP_0,DCI,IO_L01N_0/VRP_0,DCI,0
+A,3,A3,IO_L01P_0/VRN_0,DCI,IO_L01P_0/VRN_0,DCI,IO_L01P_0/VRN_0,DCI,0
+A,4,A4,IO_L15N_0,I/O,IO_L15N_0,I/O,IO_L15N_0,I/O,0
+A,5,A5,IO_L15P_0,I/O,IO_L15P_0,I/O,IO_L15P_0,I/O,0
+A,6,A6,GND,GND,GND,GND,GND,GND,N/A
+A,7,A7,IO_L30N_0,I/O,IO_L30N_0,I/O,IO_L30N_0,I/O,0
+A,8,A8,IO_L30P_0,I/O,IO_L30P_0,I/O,IO_L30P_0,I/O,0
+A,9,A9,IO_L31P_0/VREF_0,VREF,IO_L31P_0/VREF_0,VREF,IO_L31P_0/VREF_0,VREF,0
+A,10,A10,IO_L31N_1/VREF_1,VREF,IO_L31N_1/VREF_1,VREF,IO_L31N_1/VREF_1,VREF,1
+A,11,A11,IO,I/O,IO,I/O,IO,I/O,1
+A,12,A12,IO/VREF_1,VREF,IO/VREF_1,VREF,IO/VREF_1,VREF,1
+A,13,A13,GND,GND,GND,GND,GND,GND,N/A
+A,14,A14,IO_L16N_1,I/O,IO_L16N_1,I/O,IO_L16N_1,I/O,1
+A,15,A15,IO_L10N_1/VREF_1,VREF,IO_L10N_1/VREF_1,VREF,IO_L10N_1/VREF_1,VREF,1
+A,16,A16,IO_L01N_1/VRP_1,DCI,IO_L01N_1/VRP_1,DCI,IO_L01N_1/VRP_1,DCI,1
+A,17,A17,IO_L01P_1/VRN_1,DCI,IO_L01P_1/VRN_1,DCI,IO_L01P_1/VRN_1,DCI,1
+A,18,A18,GND,GND,GND,GND,GND,GND,N/A
+B,1,B1,IO_L16P_7/VREF_7,VREF,IO_L16P_7/VREF_7,VREF,IO_L16P_7/VREF_7,VREF,7
+B,2,B2,GND,GND,GND,GND,GND,GND,N/A
+B,3,B3,IO/VREF_0,VREF,IO/VREF_0,VREF,IO/VREF_0,VREF,0
+B,4,B4,IO_L09N_0,I/O,IO_L09N_0,I/O,IO_L09N_0,I/O,0
+B,5,B5,IO_L25N_0,I/O,IO_L25N_0,I/O,IO_L25N_0,I/O,0
+B,6,B6,IO_L25P_0,I/O,IO_L25P_0,I/O,IO_L25P_0,I/O,0
+B,7,B7,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+B,8,B8,VCCO_0,VCCO,VCCO_0,VCCO,VCCO_0,VCCO,0
+B,9,B9,IO_L31N_0,I/O,IO_L31N_0,I/O,IO_L31N_0,I/O,0
+B,10,B10,IO_L31P_1,I/O,IO_L31P_1,I/O,IO_L31P_1,I/O,1
+B,11,B11,VCCO_1,VCCO,VCCO_1,VCCO,VCCO_1,VCCO,1
+B,12,B12,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+B,13,B13,IO,I/O,IO,I/O,IO,I/O,1
+B,14,B14,IO_L16P_1,I/O,IO_L16P_1,I/O,IO_L16P_1,I/O,1
+B,15,B15,IO_L10P_1,I/O,IO_L10P_1,I/O,IO_L10P_1,I/O,1
+B,16,B16,TMS,JTAG,TMS,JTAG,TMS,JTAG,VCCAUX
+B,17,B17,GND,GND,GND,GND,GND,GND,N/A
+B,18,B18,IO_L16N_2,I/O,IO_L16N_2,I/O,IO_L16N_2,I/O,2
+C,1,C1,IO_L16N_7,I/O,IO_L16N_7,I/O,IO_L16N_7,I/O,7
+C,2,C2,IO_L01P_7/VRN_7,DCI,IO_L01P_7/VRN_7,DCI,IO_L01P_7/VRN_7,DCI,7
+C,3,C3,IO_L01N_7/VRP_7,DCI,IO_L01N_7/VRP_7,DCI,IO_L01N_7/VRP_7,DCI,7
+C,4,C4,IO_L09P_0,I/O,IO_L09P_0,I/O,IO_L09P_0,I/O,0
+C,5,C5,IO_L10N_0,I/O,IO_L10N_0,I/O,IO_L10N_0,I/O,0
+C,6,C6,VCCO_0,VCCO,VCCO_0,VCCO,VCCO_0,VCCO,0
+C,7,C7,IO_L27N_0,I/O,IO_L27N_0,I/O,IO_L27N_0,I/O,0
+C,8,C8,IO_L28N_0,I/O,IO_L28N_0,I/O,IO_L28N_0,I/O,0
+C,9,C9,GND,GND,GND,GND,GND,GND,N/A
+C,10,C10,GND,GND,GND,GND,GND,GND,N/A
+C,11,C11,IO_L30N_1,I/O,IO_L30N_1,I/O,IO_L30N_1,I/O,1
+C,12,C12,IO_L28N_1,I/O,IO_L28N_1,I/O,IO_L28N_1,I/O,1
+C,13,C13,VCCO_1,VCCO,VCCO_1,VCCO,VCCO_1,VCCO,1
+C,14,C14,IO_L15N_1,I/O,IO_L15N_1,I/O,IO_L15N_1,I/O,1
+C,15,C15,IO_L15P_1,I/O,IO_L15P_1,I/O,IO_L15P_1,I/O,1
+C,16,C16,IO_L01N_2/VRP_2,DCI,IO_L01N_2/VRP_2,DCI,IO_L01N_2/VRP_2,DCI,2
+C,17,C17,IO_L01P_2/VRN_2,DCI,IO_L01P_2/VRN_2,DCI,IO_L01P_2/VRN_2,DCI,2
+C,18,C18,IO_L16P_2,I/O,IO_L16P_2,I/O,IO_L16P_2,I/O,2
+D,1,D1,IO_L17N_7,I/O,IO_L17N_7,I/O,IO_L17N_7,I/O,7
+D,2,D2,IO_L17P_7,I/O,IO_L17P_7,I/O,IO_L17P_7,I/O,7
+D,3,D3,IO_L19P_7,I/O,IO_L19P_7,I/O,IO_L19P_7,I/O,7
+D,4,D4,TDI,JTAG,TDI,JTAG,TDI,JTAG,VCCAUX
+D,5,D5,IO_L10P_0,I/O,IO_L10P_0,I/O,IO_L10P_0,I/O,0
+D,6,D6,IO/VREF_0,VREF,IO/VREF_0,VREF,IO/VREF_0,VREF,0
+D,7,D7,IO_L27P_0,I/O,IO_L27P_0,I/O,IO_L27P_0,I/O,0
+D,8,D8,IO_L28P_0,I/O,IO_L28P_0,I/O,IO_L28P_0,I/O,0
+D,9,D9,IO,I/O,IO,I/O,IO,I/O,0
+D,10,D10,IO,I/O,IO,I/O,IO,I/O,1
+D,11,D11,IO_L30P_1,I/O,IO_L30P_1,I/O,IO_L30P_1,I/O,1
+D,12,D12,IO_L28P_1,I/O,IO_L28P_1,I/O,IO_L28P_1,I/O,1
+D,13,D13,IO_L24P_1,I/O,IO_L24P_1,I/O,IO_L24P_1,I/O,1
+D,14,D14,IO_L24N_1,I/O,IO_L24N_1,I/O,IO_L24N_1,I/O,1
+D,15,D15,TDO,JTAG,TDO,JTAG,TDO,JTAG,VCCAUX
+D,16,D16,IO_L19N_2,I/O,IO_L19N_2,I/O,IO_L19N_2,I/O,2
+D,17,D17,IO_L17N_2,I/O,IO_L17N_2,I/O,IO_L17N_2,I/O,2
+D,18,D18,IO_L17P_2/VREF_2,VREF,IO_L17P_2/VREF_2,VREF,IO_L17P_2/VREF_2,VREF,2
+E,1,E1,IO_L20P_7,I/O,IO_L20P_7,I/O,IO_L20P_7,I/O,7
+E,2,E2,IO_L20N_7,I/O,IO_L20N_7,I/O,IO_L20N_7,I/O,7
+E,3,E3,IO_L19N_7/VREF_7,VREF,IO_L19N_7/VREF_7,VREF,IO_L19N_7/VREF_7,VREF,7
+E,4,E4,IO_L21N_7,I/O,IO_L21N_7,I/O,IO_L21N_7,I/O,7
+E,5,E5,PROG_B,CONFIG,PROG_B,CONFIG,PROG_B,CONFIG,VCCAUX
+E,6,E6,HSWAP_EN,CONFIG,HSWAP_EN,CONFIG,HSWAP_EN,CONFIG,VCCAUX
+E,7,E7,IO,I/O,IO,I/O,IO,I/O,0
+E,8,E8,IO_L29N_0,I/O,IO_L29N_0,I/O,IO_L29N_0,I/O,0
+E,9,E9,IO_L32N_0/GCLK7,GCLK,IO_L32N_0/GCLK7,GCLK,IO_L32N_0/GCLK7,GCLK,0
+E,10,E10,IO_L32N_1/GCLK5,GCLK,IO_L32N_1/GCLK5,GCLK,IO_L32N_1/GCLK5,GCLK,1
+E,11,E11,IO_L29P_1,I/O,IO_L29P_1,I/O,IO_L29P_1,I/O,1
+E,12,E12,IO_L27P_1,I/O,IO_L27P_1,I/O,IO_L27P_1,I/O,1
+E,13,E13,IO_L27N_1,I/O,IO_L27N_1,I/O,IO_L27N_1,I/O,1
+E,14,E14,TCK,JTAG,TCK,JTAG,TCK,JTAG,VCCAUX
+E,15,E15,IO_L21P_2,I/O,IO_L21P_2,I/O,IO_L21P_2,I/O,2
+E,16,E16,IO_L19P_2,I/O,IO_L19P_2,I/O,IO_L19P_2,I/O,2
+E,17,E17,IO_L20N_2,I/O,IO_L20N_2,I/O,IO_L20N_2,I/O,2
+E,18,E18,IO_L20P_2,I/O,IO_L20P_2,I/O,IO_L20P_2,I/O,2
+F,1,F1,GND,GND,GND,GND,GND,GND,N/A
+F,2,F2,IO_L23P_7,I/O,IO_L23P_7,I/O,IO_L23P_7,I/O,7
+F,3,F3,VCCO_7,VCCO,VCCO_7,VCCO,VCCO_7,VCCO,7
+F,4,F4,IO_L21P_7,I/O,IO_L21P_7,I/O,IO_L21P_7,I/O,7
+F,5,F5,IO_L22P_7,I/O,IO_L22P_7,I/O,IO_L22P_7,I/O,7
+F,6,F6,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+F,7,F7,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+F,8,F8,IO_L29P_0,I/O,IO_L29P_0,I/O,IO_L29P_0,I/O,0
+F,9,F9,IO_L32P_0/GCLK6,GCLK,IO_L32P_0/GCLK6,GCLK,IO_L32P_0/GCLK6,GCLK,0
+F,10,F10,IO_L32P_1/GCLK4,GCLK,IO_L32P_1/GCLK4,GCLK,IO_L32P_1/GCLK4,GCLK,1
+F,11,F11,IO_L29N_1,I/O,IO_L29N_1,I/O,IO_L29N_1,I/O,1
+F,12,F12,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+F,13,F13,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+F,14,F14,IO_L22N_2,I/O,IO_L22N_2,I/O,IO_L22N_2,I/O,2
+F,15,F15,IO_L21N_2,I/O,IO_L21N_2,I/O,IO_L21N_2,I/O,2
+F,16,F16,VCCO_2,VCCO,VCCO_2,VCCO,VCCO_2,VCCO,2
+F,17,F17,IO_L23P_2,I/O,IO_L23P_2,I/O,IO_L23P_2,I/O,2
+F,18,F18,GND,GND,GND,GND,GND,GND,N/A
+G,1,G1,IO_L23N_7,I/O,IO_L23N_7,I/O,IO_L23N_7,I/O,7
+G,2,G2,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+G,3,G3,IO_L24P_7,I/O,IO_L24P_7,I/O,IO_L24P_7,I/O,7
+G,4,G4,IO_L24N_7,I/O,IO_L24N_7,I/O,IO_L24N_7,I/O,7
+G,5,G5,IO_L22N_7,I/O,IO_L22N_7,I/O,IO_L22N_7,I/O,7
+G,6,G6,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+G,7,G7,GND,GND,GND,GND,GND,GND,N/A
+G,8,G8,VCCO_0,VCCO,VCCO_0,VCCO,VCCO_0,VCCO,0
+G,9,G9,VCCO_0,VCCO,VCCO_0,VCCO,VCCO_0,VCCO,0
+G,10,G10,VCCO_1,VCCO,VCCO_1,VCCO,VCCO_1,VCCO,1
+G,11,G11,VCCO_1,VCCO,VCCO_1,VCCO,VCCO_1,VCCO,1
+G,12,G12,GND,GND,GND,GND,GND,GND,N/A
+G,13,G13,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+G,14,G14,IO_L22P_2,I/O,IO_L22P_2,I/O,IO_L22P_2,I/O,2
+G,15,G15,IO_L24N_2,I/O,IO_L24N_2,I/O,IO_L24N_2,I/O,2
+G,16,G16,IO_L24P_2,I/O,IO_L24P_2,I/O,IO_L24P_2,I/O,2
+G,17,G17,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+G,18,G18,IO_L23N_2/VREF_2,VREF,IO_L23N_2/VREF_2,VREF,IO_L23N_2/VREF_2,VREF,2
+H,1,H1,IO_L35N_7,I/O,IO_L35N_7,I/O,IO_L35N_7,I/O,7
+H,2,H2,IO_L35P_7,I/O,IO_L35P_7,I/O,IO_L35P_7,I/O,7
+H,3,H3,IO_L34P_7,I/O,IO_L34P_7,I/O,IO_L34P_7,I/O,7
+H,4,H4,IO_L34N_7,I/O,IO_L34N_7,I/O,IO_L34N_7,I/O,7
+H,5,H5,IO_L27N_7,I/O,IO_L27N_7,I/O,IO_L27N_7,I/O,7
+H,6,H6,IO_L27P_7/VREF_7,VREF,IO_L27P_7/VREF_7,VREF,IO_L27P_7/VREF_7,VREF,7
+H,7,H7,VCCO_7,VCCO,VCCO_7,VCCO,VCCO_7,VCCO,7
+H,8,H8,GND,GND,GND,GND,GND,GND,N/A
+H,9,H9,GND,GND,GND,GND,GND,GND,N/A
+H,10,H10,GND,GND,GND,GND,GND,GND,N/A
+H,11,H11,GND,GND,GND,GND,GND,GND,N/A
+H,12,H12,VCCO_2,VCCO,VCCO_2,VCCO,VCCO_2,VCCO,2
+H,13,H13,IO_L27N_2,I/O,IO_L27N_2,I/O,IO_L27N_2,I/O,2
+H,14,H14,IO_L27P_2,I/O,IO_L27P_2,I/O,IO_L27P_2,I/O,2
+H,15,H15,IO_L34P_2,I/O,IO_L34P_2,I/O,IO_L34P_2,I/O,2
+H,16,H16,IO_L34N_2/VREF_2,VREF,IO_L34N_2/VREF_2,VREF,IO_L34N_2/VREF_2,VREF,2
+H,17,H17,IO_L35N_2,I/O,IO_L35N_2,I/O,IO_L35N_2,I/O,2
+H,18,H18,IO_L35P_2,I/O,IO_L35P_2,I/O,IO_L35P_2,I/O,2
+J,1,J1,IO_L39N_7,I/O,IO_L39N_7,I/O,IO_L39N_7,I/O,7
+J,2,J2,IO_L39P_7,I/O,IO_L39P_7,I/O,IO_L39P_7,I/O,7
+J,3,J3,GND,GND,GND,GND,GND,GND,N/A
+J,4,J4,IO_L40P_7,I/O,IO_L40P_7,I/O,IO_L40P_7,I/O,7
+J,5,J5,IO_L40N_7/VREF_7,VREF,IO_L40N_7/VREF_7,VREF,IO_L40N_7/VREF_7,VREF,7
+J,6,J6,IO,I/O,IO,I/O,IO,I/O,7
+J,7,J7,VCCO_7,VCCO,VCCO_7,VCCO,VCCO_7,VCCO,7
+J,8,J8,GND,GND,GND,GND,GND,GND,N/A
+J,11,J11,GND,GND,GND,GND,GND,GND,N/A
+J,12,J12,VCCO_2,VCCO,VCCO_2,VCCO,VCCO_2,VCCO,2
+J,13,J13,IO,I/O,IO,I/O,IO,I/O,2
+J,14,J14,IO_L40P_2/VREF_2,VREF,IO_L40P_2/VREF_2,VREF,IO_L40P_2/VREF_2,VREF,2
+J,15,J15,IO_L40N_2,I/O,IO_L40N_2,I/O,IO_L40N_2,I/O,2
+J,16,J16,GND,GND,GND,GND,GND,GND,N/A
+J,17,J17,IO_L39P_2,I/O,IO_L39P_2,I/O,IO_L39P_2,I/O,2
+J,18,J18,IO_L39N_2,I/O,IO_L39N_2,I/O,IO_L39N_2,I/O,2
+K,1,K1,IO_L40N_6,I/O,IO_L40N_6,I/O,IO_L40N_6,I/O,6
+K,2,K2,IO_L40P_6/VREF_6,VREF,IO_L40P_6/VREF_6,VREF,IO_L40P_6/VREF_6,VREF,6
+K,3,K3,GND,GND,GND,GND,GND,GND,N/A
+K,4,K4,IO_L39P_6,I/O,IO_L39P_6,I/O,IO_L39P_6,I/O,6
+K,5,K5,IO_L39N_6,I/O,IO_L39N_6,I/O,IO_L39N_6,I/O,6
+K,6,K6,IO,I/O,IO,I/O,IO,I/O,6
+K,7,K7,VCCO_6,VCCO,VCCO_6,VCCO,VCCO_6,VCCO,6
+K,8,K8,GND,GND,GND,GND,GND,GND,N/A
+K,11,K11,GND,GND,GND,GND,GND,GND,N/A
+K,12,K12,VCCO_3,VCCO,VCCO_3,VCCO,VCCO_3,VCCO,3
+K,13,K13,IO_L39N_3,I/O,IO_L39N_3,I/O,IO_L39N_3,I/O,3
+K,14,K14,IO_L39P_3,I/O,IO_L39P_3,I/O,IO_L39P_3,I/O,3
+K,15,K15,IO,I/O,IO,I/O,IO,I/O,3
+K,16,K16,GND,GND,GND,GND,GND,GND,N/A
+K,17,K17,IO_L40N_3/VREF_3,VREF,IO_L40N_3/VREF_3,VREF,IO_L40N_3/VREF_3,VREF,3
+K,18,K18,IO_L40P_3,I/O,IO_L40P_3,I/O,IO_L40P_3,I/O,3
+L,1,L1,IO_L35P_6,I/O,IO_L35P_6,I/O,IO_L35P_6,I/O,6
+L,2,L2,IO_L35N_6,I/O,IO_L35N_6,I/O,IO_L35N_6,I/O,6
+L,3,L3,IO_L34N_6/VREF_6,VREF,IO_L34N_6/VREF_6,VREF,IO_L34N_6/VREF_6,VREF,6
+L,4,L4,IO_L34P_6,I/O,IO_L34P_6,I/O,IO_L34P_6,I/O,6
+L,5,L5,IO_L27P_6,I/O,IO_L27P_6,I/O,IO_L27P_6,I/O,6
+L,6,L6,IO_L27N_6,I/O,IO_L27N_6,I/O,IO_L27N_6,I/O,6
+L,7,L7,VCCO_6,VCCO,VCCO_6,VCCO,VCCO_6,VCCO,6
+L,8,L8,GND,GND,GND,GND,GND,GND,N/A
+L,9,L9,GND,GND,GND,GND,GND,GND,N/A
+L,10,L10,GND,GND,GND,GND,GND,GND,N/A
+L,11,L11,GND,GND,GND,GND,GND,GND,N/A
+L,12,L12,VCCO_3,VCCO,VCCO_3,VCCO,VCCO_3,VCCO,3
+L,13,L13,IO_L27P_3,I/O,IO_L27P_3,I/O,IO_L27P_3,I/O,3
+L,14,L14,IO_L27N_3,I/O,IO_L27N_3,I/O,IO_L27N_3,I/O,3
+L,15,L15,IO_L34N_3,I/O,IO_L34N_3,I/O,IO_L34N_3,I/O,3
+L,16,L16,IO_L34P_3/VREF_3,VREF,IO_L34P_3/VREF_3,VREF,IO_L34P_3/VREF_3,VREF,3
+L,17,L17,IO_L35P_3,I/O,IO_L35P_3,I/O,IO_L35P_3,I/O,3
+L,18,L18,IO_L35N_3,I/O,IO_L35N_3,I/O,IO_L35N_3,I/O,3
+M,1,M1,IO_L24P_6,I/O,IO_L24P_6,I/O,IO_L24P_6,I/O,6
+M,2,M2,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+M,3,M3,IO_L23N_6,I/O,IO_L23N_6,I/O,IO_L23N_6,I/O,6
+M,4,M4,IO_L23P_6,I/O,IO_L23P_6,I/O,IO_L23P_6,I/O,6
+M,5,M5,IO_L22P_6,I/O,IO_L22P_6,I/O,IO_L22P_6,I/O,6
+M,6,M6,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+M,7,M7,GND,GND,GND,GND,GND,GND,N/A
+M,8,M8,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+M,9,M9,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+M,10,M10,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+M,11,M11,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+M,12,M12,GND,GND,GND,GND,GND,GND,N/A
+M,13,M13,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+M,14,M14,IO_L22N_3,I/O,IO_L22N_3,I/O,IO_L22N_3,I/O,3
+M,15,M15,IO_L23N_3,I/O,IO_L23N_3,I/O,IO_L23N_3,I/O,3
+M,16,M16,IO_L23P_3/VREF_3,VREF,IO_L23P_3/VREF_3,VREF,IO_L23P_3/VREF_3,VREF,3
+M,17,M17,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+M,18,M18,IO_L24N_3,I/O,IO_L24N_3,I/O,IO_L24N_3,I/O,3
+N,1,N1,GND,GND,GND,GND,GND,GND,N/A
+N,2,N2,IO_L24N_6/VREF_6,VREF,IO_L24N_6/VREF_6,VREF,IO_L24N_6/VREF_6,VREF,6
+N,3,N3,VCCO_6,VCCO,VCCO_6,VCCO,VCCO_6,VCCO,6
+N,4,N4,IO_L21N_6,I/O,IO_L21N_6,I/O,IO_L21N_6,I/O,6
+N,5,N5,IO_L22N_6,I/O,IO_L22N_6,I/O,IO_L22N_6,I/O,6
+N,6,N6,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+N,7,N7,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+N,8,N8,IO,I/O,IO,I/O,IO,I/O,5
+N,9,N9,IO_L32N_5/GCLK3,GCLK,IO_L32N_5/GCLK3,GCLK,IO_L32N_5/GCLK3,GCLK,5
+N,10,N10,IO_L32N_4/GCLK1,GCLK,IO_L32N_4/GCLK1,GCLK,IO_L32N_4/GCLK1,GCLK,4
+N,11,N11,IO_L30N_4/D2,DUAL,IO_L30N_4/D2,DUAL,IO_L30N_4/D2,DUAL,4
+N,12,N12,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+N,13,N13,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,VCCINT,N/A
+N,14,N14,IO_L22P_3,I/O,IO_L22P_3,I/O,IO_L22P_3,I/O,3
+N,15,N15,IO_L21P_3,I/O,IO_L21P_3,I/O,IO_L21P_3,I/O,3
+N,16,N16,VCCO_3,VCCO,VCCO_3,VCCO,VCCO_3,VCCO,3
+N,17,N17,IO_L24P_3,I/O,IO_L24P_3,I/O,IO_L24P_3,I/O,3
+N,18,N18,GND,GND,GND,GND,GND,GND,N/A
+P,1,P1,IO_L20P_6,I/O,IO_L20P_6,I/O,IO_L20P_6,I/O,6
+P,2,P2,IO_L20N_6,I/O,IO_L20N_6,I/O,IO_L20N_6,I/O,6
+P,3,P3,IO_L19P_6,I/O,IO_L19P_6,I/O,IO_L19P_6,I/O,6
+P,4,P4,IO_L21P_6,I/O,IO_L21P_6,I/O,IO_L21P_6,I/O,6
+P,5,P5,M0,CONFIG,M0,CONFIG,M0,CONFIG,VCCAUX
+P,6,P6,IO_L27N_5/VREF_5,VREF,IO_L27N_5/VREF_5,VREF,IO_L27N_5/VREF_5,VREF,5
+P,7,P7,IO_L27P_5,I/O,IO_L27P_5,I/O,IO_L27P_5,I/O,5
+P,8,P8,IO,I/O,IO,I/O,IO,I/O,5
+P,9,P9,IO_L32P_5/GCLK2,GCLK,IO_L32P_5/GCLK2,GCLK,IO_L32P_5/GCLK2,GCLK,5
+P,10,P10,IO_L32P_4/GCLK0,GCLK,IO_L32P_4/GCLK0,GCLK,IO_L32P_4/GCLK0,GCLK,4
+P,11,P11,IO_L30P_4/D3,DUAL,IO_L30P_4/D3,DUAL,IO_L30P_4/D3,DUAL,4
+P,12,P12,IO,I/O,IO,I/O,IO,I/O,4
+P,13,P13,IO_L25P_4,I/O,IO_L25P_4,I/O,IO_L25P_4,I/O,4
+P,14,P14,IO_L06N_4/VREF_4,VREF,IO_L06N_4/VREF_4,VREF,IO_L06N_4/VREF_4,VREF,4
+P,15,P15,IO_L21N_3,I/O,IO_L21N_3,I/O,IO_L21N_3,I/O,3
+P,16,P16,IO_L17N_3,I/O,IO_L17N_3,I/O,IO_L17N_3,I/O,3
+P,17,P17,IO_L20P_3,I/O,IO_L20P_3,I/O,IO_L20P_3,I/O,3
+P,18,P18,IO_L20N_3,I/O,IO_L20N_3,I/O,IO_L20N_3,I/O,3
+R,1,R1,IO_L17P_6/VREF_6,VREF,IO_L17P_6/VREF_6,VREF,IO_L17P_6/VREF_6,VREF,6
+R,2,R2,IO_L17N_6,I/O,IO_L17N_6,I/O,IO_L17N_6,I/O,6
+R,3,R3,IO_L19N_6,I/O,IO_L19N_6,I/O,IO_L19N_6,I/O,6
+R,4,R4,M2,CONFIG,M2,CONFIG,M2,CONFIG,VCCAUX
+R,5,R5,IO_L15P_5,I/O,IO_L15P_5,I/O,IO_L15P_5,I/O,5
+R,6,R6,IO_L15N_5,I/O,IO_L15N_5,I/O,IO_L15N_5,I/O,5
+R,7,R7,IO_L28N_5/D6,DUAL,IO_L28N_5/D6,DUAL,IO_L28N_5/D6,DUAL,5
+R,8,R8,IO_L30N_5,I/O,IO_L30N_5,I/O,IO_L30N_5,I/O,5
+R,9,R9,IO/VREF_5,VREF,IO/VREF_5,VREF,IO/VREF_5,VREF,5
+R,10,R10,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+R,11,R11,IO_L29N_4,I/O,IO_L29N_4,I/O,IO_L29N_4,I/O,4
+R,12,R12,IO_L27P_4/D1,DUAL,IO_L27P_4/D1,DUAL,IO_L27P_4/D1,DUAL,4
+R,13,R13,IO_L25N_4,I/O,IO_L25N_4,I/O,IO_L25N_4,I/O,4
+R,14,R14,IO_L06P_4,I/O,IO_L06P_4,I/O,IO_L06P_4,I/O,4
+R,15,R15,DONE,CONFIG,DONE,CONFIG,DONE,CONFIG,VCCAUX
+R,16,R16,IO_L17P_3/VREF_3,VREF,IO_L17P_3/VREF_3,VREF,IO_L17P_3/VREF_3,VREF,3
+R,17,R17,IO_L19N_3,I/O,IO_L19N_3,I/O,IO_L19N_3,I/O,3
+R,18,R18,IO_L19P_3,I/O,IO_L19P_3,I/O,IO_L19P_3,I/O,3
+T,1,T1,IO_L16P_6,I/O,IO_L16P_6,I/O,IO_L16P_6,I/O,6
+T,2,T2,IO_L01P_6/VRN_6,DCI,IO_L01P_6/VRN_6,DCI,IO_L01P_6/VRN_6,DCI,6
+T,3,T3,IO_L01N_6/VRP_6,DCI,IO_L01N_6/VRP_6,DCI,IO_L01N_6/VRP_6,DCI,6
+T,4,T4,IO_L06P_5,I/O,IO_L06P_5,I/O,IO_L06P_5,I/O,5
+T,5,T5,IO_L06N_5,I/O,IO_L06N_5,I/O,IO_L06N_5,I/O,5
+T,6,T6,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+T,7,T7,IO_L28P_5/D7,DUAL,IO_L28P_5/D7,DUAL,IO_L28P_5/D7,DUAL,5
+T,8,T8,IO_L30P_5,I/O,IO_L30P_5,I/O,IO_L30P_5,I/O,5
+T,9,T9,GND,GND,GND,GND,GND,GND,N/A
+T,10,T10,GND,GND,GND,GND,GND,GND,N/A
+T,11,T11,IO_L29P_4,I/O,IO_L29P_4,I/O,IO_L29P_4,I/O,4
+T,12,T12,IO_L27N_4/DIN/D0,DUAL,IO_L27N_4/DIN/D0,DUAL,IO_L27N_4/DIN/D0,DUAL,4
+T,13,T13,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+T,14,T14,IO_L10N_4,I/O,IO_L10N_4,I/O,IO_L10N_4,I/O,4
+T,15,T15,CCLK,CONFIG,CCLK,CONFIG,CCLK,CONFIG,VCCAUX
+T,16,T16,IO_L01P_3/VRN_3,DCI,IO_L01P_3/VRN_3,DCI,IO_L01P_3/VRN_3,DCI,3
+T,17,T17,IO_L01N_3/VRP_3,DCI,IO_L01N_3/VRP_3,DCI,IO_L01N_3/VRP_3,DCI,3
+T,18,T18,IO_L16N_3,I/O,IO_L16N_3,I/O,IO_L16N_3,I/O,3
+U,1,U1,IO_L16N_6,I/O,IO_L16N_6,I/O,IO_L16N_6,I/O,6
+U,2,U2,GND,GND,GND,GND,GND,GND,N/A
+U,3,U3,M1,CONFIG,M1,CONFIG,M1,CONFIG,VCCAUX
+U,4,U4,IO_L10P_5/VRN_5,DCI,IO_L10P_5/VRN_5,DCI,IO_L10P_5/VRN_5,DCI,5
+U,5,U5,IO_L16P_5,I/O,IO_L16P_5,I/O,IO_L16P_5,I/O,5
+U,6,U6,IO,I/O,IO,I/O,IO,I/O,5
+U,7,U7,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+U,8,U8,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+U,9,U9,IO_L31N_5/D4,DUAL,IO_L31N_5/D4,DUAL,IO_L31N_5/D4,DUAL,5
+U,10,U10,IO_L31N_4/INIT_B,DUAL,IO_L31N_4/INIT_B,DUAL,IO_L31N_4/INIT_B,DUAL,4
+U,11,U11,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+U,12,U12,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+U,13,U13,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+U,14,U14,IO_L10P_4,I/O,IO_L10P_4,I/O,IO_L10P_4,I/O,4
+U,15,U15,IO_L09N_4,I/O,IO_L09N_4,I/O,IO_L09N_4,I/O,4
+U,16,U16,IO_L01N_4/VRP_4,DCI,IO_L01N_4/VRP_4,DCI,IO_L01N_4/VRP_4,DCI,4
+U,17,U17,GND,GND,GND,GND,GND,GND,N/A
+U,18,U18,IO_L16P_3,I/O,IO_L16P_3,I/O,IO_L16P_3,I/O,3
+V,1,V1,GND,GND,GND,GND,GND,GND,N/A
+V,2,V2,IO_L01P_5/CS_B,DUAL,IO_L01P_5/CS_B,DUAL,IO_L01P_5/CS_B,DUAL,5
+V,3,V3,IO_L01N_5/RDWR_B,DUAL,IO_L01N_5/RDWR_B,DUAL,IO_L01N_5/RDWR_B,DUAL,5
+V,4,V4,IO_L10N_5/VRP_5,DCI,IO_L10N_5/VRP_5,DCI,IO_L10N_5/VRP_5,DCI,5
+V,5,V5,IO_L16N_5,I/O,IO_L16N_5,I/O,IO_L16N_5,I/O,5
+V,6,V6,GND,GND,GND,GND,GND,GND,N/A
+V,7,V7,IO_L29P_5/VREF_5,VREF,IO_L29P_5/VREF_5,VREF,IO_L29P_5/VREF_5,VREF,5
+V,8,V8,IO_L29N_5,I/O,IO_L29N_5,I/O,IO_L29N_5,I/O,5
+V,9,V9,IO_L31P_5/D5,DUAL,IO_L31P_5/D5,DUAL,IO_L31P_5/D5,DUAL,5
+V,10,V10,IO_L31P_4/DOUT/BUSY,DUAL,IO_L31P_4/DOUT/BUSY,DUAL,IO_L31P_4/DOUT/BUSY,DUAL,4
+V,11,V11,IO_L28P_4,I/O,IO_L28P_4,I/O,IO_L28P_4,I/O,4
+V,12,V12,IO_L28N_4,I/O,IO_L28N_4,I/O,IO_L28N_4,I/O,4
+V,13,V13,GND,GND,GND,GND,GND,GND,N/A
+V,14,V14,IO,I/O,IO,I/O,IO,I/O,4
+V,15,V15,IO_L09P_4,I/O,IO_L09P_4,I/O,IO_L09P_4,I/O,4
+V,16,V16,IO_L01P_4/VRN_4,DCI,IO_L01P_4/VRN_4,DCI,IO_L01P_4/VRN_4,DCI,4
+V,17,V17,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+V,18,V18,GND,GND,GND,GND,GND,GND,N/A

Copied: usrp-hw/trunk/sym/xilinx/fg456_table.csv (from rev 10171, 
usrp-hw/trunk/sym/generated/fg456_table.csv)
===================================================================
--- usrp-hw/trunk/sym/xilinx/fg456_table.csv                            (rev 0)
+++ usrp-hw/trunk/sym/xilinx/fg456_table.csv    2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,457 @@
+SORT_ROW,SORT_ROW_#,SORT_COLUMN,PIN_NUMBER,XC3S400,XC3S400_TYPE,XC3S1000,XC3S1000_TYPE,XC3S1500,XC3S1500_TYPE,XC3S2000,XC3S2000_TYPE,BANK
+A,1,1,A1,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+A,1,2,A2,PROG_B,CONFIG,PROG_B,CONFIG,PROG_B,CONFIG,PROG_B,CONFIG,VCCAUX
+A,1,3,A3,IO/VREF_0,VREF,IO/VREF_0,VREF,IO/VREF_0,VREF,IO/VREF_0,VREF,0
+A,1,4,A4,IO_L01P_0/VRN_0,DCI,IO_L01P_0/VRN_0,DCI,IO_L01P_0/VRN_0,DCI,IO_L01P_0/VRN_0,DCI,0
+A,1,5,A5,IO_L09P_0,I/O,IO_L09P_0,I/O,IO_L09P_0,I/O,IO_L09P_0,I/O,0
+A,1,6,A6,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+A,1,7,A7,N.C.,N.C.,IO_L19P_0,I/O,IO_L19P_0,I/O,IO_L19P_0,I/O,0
+A,1,8,A8,IO_L24P_0,I/O,IO_L24P_0,I/O,IO_L24P_0,I/O,IO_L24P_0,I/O,0
+A,1,9,A9,IO_L27P_0,I/O,IO_L27P_0,I/O,IO_L27P_0,I/O,IO_L27P_0,I/O,0
+A,1,10,A10,IO,I/O,IO,I/O,IO,I/O,IO,I/O,0
+A,1,11,A11,IO_L32P_0/GCLK6,GCLK,IO_L32P_0/GCLK6,GCLK,IO_L32P_0/GCLK6,GCLK,IO_L32P_0/GCLK6,GCLK,0
+A,1,12,A12,IO,I/O,IO,I/O,IO,I/O,IO,I/O,1
+A,1,13,A13,IO_L30N_1,I/O,IO_L30N_1,I/O,IO_L30N_1,I/O,IO_L30N_1,I/O,1
+A,1,14,A14,IO_L28N_1,I/O,IO_L28N_1,I/O,IO_L28N_1,I/O,IO_L28N_1,I/O,1
+A,1,15,A15,IO_L25P_1,I/O,IO_L25P_1,I/O,IO_L25P_1,I/O,IO_L25P_1,I/O,1
+A,1,16,A16,N.C.,N.C.,IO_L22N_1,I/O,IO_L22N_1,I/O,IO_L22N_1,I/O,1
+A,1,17,A17,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+A,1,18,A18,IO_L10N_1/VREF_1,VREF,IO_L10N_1/VREF_1,VREF,IO_L10N_1/VREF_1,VREF,IO_L10N_1/VREF_1,VREF,1
+A,1,19,A19,IO_L06N_1/VREF_1,VREF,IO_L06N_1/VREF_1,VREF,IO_L06N_1/VREF_1,VREF,IO_L06N_1/VREF_1,VREF,1
+A,1,20,A20,TMS,JTAG,TMS,JTAG,TMS,JTAG,TMS,JTAG,VCCAUX
+A,1,21,A21,TCK,JTAG,TCK,JTAG,TCK,JTAG,TCK,JTAG,VCCAUX
+A,1,22,A22,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+B,2,1,B1,TDI,JTAG,TDI,JTAG,TDI,JTAG,TDI,JTAG,VCCAUX
+B,2,2,B2,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+B,2,3,B3,HSWAP_EN,CONFIG,HSWAP_EN,CONFIG,HSWAP_EN,CONFIG,HSWAP_EN,CONFIG,VCCAUX
+B,2,4,B4,IO_L01N_0/VRP_0,DCI,IO_L01N_0/VRP_0,DCI,IO_L01N_0/VRP_0,DCI,IO_L01N_0/VRP_0,DCI,0
+B,2,5,B5,IO_L09N_0,I/O,IO_L09N_0,I/O,IO_L09N_0,I/O,IO_L09N_0,I/O,0
+B,2,6,B6,IO_L15P_0,I/O,IO_L15P_0,I/O,IO_L15P_0,I/O,IO_L15P_0,I/O,0
+B,2,7,B7,N.C.,N.C.,IO_L19N_0,I/O,IO_L19N_0,I/O,IO_L19N_0,I/O,0
+B,2,8,B8,IO_L24N_0,I/O,IO_L24N_0,I/O,IO_L24N_0,I/O,IO_L24N_0,I/O,0
+B,2,9,B9,IO_L27N_0,I/O,IO_L27N_0,I/O,IO_L27N_0,I/O,IO_L27N_0,I/O,0
+B,2,10,B10,IO_L29P_0,I/O,IO_L29P_0,I/O,IO_L29P_0,I/O,IO_L29P_0,I/O,0
+B,2,11,B11,IO_L32N_0/GCLK7,GCLK,IO_L32N_0/GCLK7,GCLK,IO_L32N_0/GCLK7,GCLK,IO_L32N_0/GCLK7,GCLK,0
+B,2,12,B12,IO_L32N_1/GCLK5,GCLK,IO_L32N_1/GCLK5,GCLK,IO_L32N_1/GCLK5,GCLK,IO_L32N_1/GCLK5,GCLK,1
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+T,16,21,T21,IO_L27P_3,I/O,IO_L27P_3,I/O,IO_L27P_3,I/O,IO_L27P_3,I/O,3
+T,16,22,T22,IO_L27N_3,I/O,IO_L27N_3,I/O,IO_L27N_3,I/O,IO_L27N_3,I/O,3
+U,17,1,U1,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+U,17,2,U2,IO_L24P_6,I/O,IO_L24P_6,I/O,IO_L24P_6,I/O,IO_L24P_6,I/O,6
+U,17,3,U3,IO_L24N_6/VREF_6,VREF,IO_L24N_6/VREF_6,VREF,IO_L24N_6/VREF_6,VREF,IO_L24N_6/VREF_6,VREF,6
+U,17,4,U4,IO_L23N_6,I/O,IO_L23N_6,I/O,IO_L23N_6,I/O,IO_L23N_6,I/O,6
+U,17,5,U5,IO_L19P_6,I/O,IO_L19P_6,I/O,IO_L19P_6,I/O,IO_L19P_6,I/O,6
+U,17,6,U6,IO/VREF_5,VREF,IO/VREF_5,VREF,IO/VREF_5,VREF,IO/VREF_5,VREF,5
+U,17,7,U7,IO,I/O,IO,I/O,IO,I/O,IO,I/O,5
+U,17,8,U8,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+U,17,9,U9,N.C.,N.C.,IO,I/O,IO,I/O,IO,I/O,5
+U,17,10,U10,IO,I/O,IO,I/O,IO,I/O,IO,I/O,5
+U,17,11,U11,IO,I/O,IO,I/O,IO,I/O,IO,I/O,5
+U,17,12,U12,IO_L30N_4/D2,DUAL,IO_L30N_4/D2,DUAL,IO_L30N_4/D2,DUAL,IO_L30N_4/D2,DUAL,4
+U,17,13,U13,IO_L28N_4,I/O,IO_L28N_4,I/O,IO_L28N_4,I/O,IO_L28N_4,I/O,4
+U,17,14,U14,IO_L25N_4,I/O,IO_L25N_4,I/O,IO_L25N_4,I/O,IO_L25N_4,I/O,4
+U,17,15,U15,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+U,17,16,U16,IO,I/O,IO,I/O,IO,I/O,IO,I/O,4
+U,17,17,U17,IO,I/O,IO,I/O,IO,I/O,IO,I/O,4
+U,17,18,U18,IO_L22P_3,I/O,IO_L22P_3,I/O,IO_L22P_3,I/O,IO_L22P_3,I/O,3
+U,17,19,U19,IO_L20N_3,I/O,IO_L20N_3,I/O,IO_L20N_3,I/O,IO_L20N_3,I/O,3
+U,17,20,U20,IO_L23P_3/VREF_3,VREF,IO_L23P_3/VREF_3,VREF,IO_L23P_3/VREF_3,VREF,IO_L23P_3/VREF_3,VREF,3
+U,17,21,U21,IO_L23N_3,I/O,IO_L23N_3,I/O,IO_L23N_3,I/O,IO_L23N_3,I/O,3
+U,17,22,U22,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+V,18,1,V1,IO_L21P_6,I/O,IO_L21P_6,I/O,IO_L21P_6,I/O,IO_L21P_6,I/O,6
+V,18,2,V2,IO_L21N_6,I/O,IO_L21N_6,I/O,IO_L21N_6,I/O,IO_L21N_6,I/O,6
+V,18,3,V3,IO_L20P_6,I/O,IO_L20P_6,I/O,IO_L20P_6,I/O,IO_L20P_6,I/O,6
+V,18,4,V4,IO_L20N_6,I/O,IO_L20N_6,I/O,IO_L20N_6,I/O,IO_L20N_6,I/O,6
+V,18,5,V5,IO_L19N_6,I/O,IO_L19N_6,I/O,IO_L19N_6,I/O,IO_L19N_6,I/O,6
+V,18,6,V6,IO_L15P_5,I/O,IO_L15P_5,I/O,IO_L15P_5,I/O,IO_L15P_5,I/O,5
+V,18,7,V7,IO,I/O,IO,I/O,IO,I/O,IO,I/O,5
+V,18,8,V8,IO_L24P_5,I/O,IO_L24P_5,I/O,IO_L24P_5,I/O,IO_L24P_5,I/O,5
+V,18,9,V9,IO_L27P_5,I/O,IO_L27P_5,I/O,IO_L27P_5,I/O,IO_L27P_5,I/O,5
+V,18,10,V10,IO,I/O,IO,I/O,IO,I/O,IO,I/O,5
+V,18,11,V11,IO_L31P_5/D5,DUAL,IO_L31P_5/D5,DUAL,IO_L31P_5/D5,DUAL,IO_L31P_5/D5,DUAL,5
+V,18,12,V12,IO_L30P_4/D3,DUAL,IO_L30P_4/D3,DUAL,IO_L30P_4/D3,DUAL,IO_L30P_4/D3,DUAL,4
+V,18,13,V13,IO_L28P_4,I/O,IO_L28P_4,I/O,IO_L28P_4,I/O,IO_L28P_4,I/O,4
+V,18,14,V14,IO_L25P_4,I/O,IO_L25P_4,I/O,IO_L25P_4,I/O,IO_L25P_4,I/O,4
+V,18,15,V15,N.C.,N.C.,IO_L22N_4/VREF_4,VREF,IO_L22N_4/VREF_4,VREF,IO_L22N_4/VREF_4,VREF,4
+V,18,16,V16,IO_L16N_4,I/O,IO_L16N_4,I/O,IO_L16N_4,I/O,IO_L16N_4,I/O,4
+V,18,17,V17,IO_L10N_4,I/O,IO_L10N_4,I/O,IO_L10N_4,I/O,IO_L10N_4,I/O,4
+V,18,18,V18,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+V,18,19,V19,IO_L17N_3,I/O,IO_L17N_3,I/O,IO_L17N_3,I/O,IO_L17N_3,I/O,3
+V,18,20,V20,IO_L20P_3,I/O,IO_L20P_3,I/O,IO_L20P_3,I/O,IO_L20P_3,I/O,3
+V,18,21,V21,IO_L21P_3,I/O,IO_L21P_3,I/O,IO_L21P_3,I/O,IO_L21P_3,I/O,3
+V,18,22,V22,IO_L21N_3,I/O,IO_L21N_3,I/O,IO_L21N_3,I/O,IO_L21N_3,I/O,3
+W,19,1,W1,IO_L17P_6/VREF_6,VREF,IO_L17P_6/VREF_6,VREF,IO_L17P_6/VREF_6,VREF,IO_L17P_6/VREF_6,VREF,6
+W,19,2,W2,IO_L17N_6,I/O,IO_L17N_6,I/O,IO_L17N_6,I/O,IO_L17N_6,I/O,6
+W,19,3,W3,IO_L16P_6,I/O,IO_L16P_6,I/O,IO_L16P_6,I/O,IO_L16P_6,I/O,6
+W,19,4,W4,IO_L16N_6,I/O,IO_L16N_6,I/O,IO_L16N_6,I/O,IO_L16N_6,I/O,6
+W,19,5,W5,IO_L09P_5,I/O,IO_L09P_5,I/O,IO_L09P_5,I/O,IO_L09P_5,I/O,5
+W,19,6,W6,IO_L15N_5,I/O,IO_L15N_5,I/O,IO_L15N_5,I/O,IO_L15N_5,I/O,5
+W,19,7,W7,N.C.,N.C.,IO_L19P_5/VREF_5,VREF,IO_L19P_5/VREF_5,VREF,IO_L19P_5/VREF_5,VREF,5
+W,19,8,W8,IO_L24N_5,I/O,IO_L24N_5,I/O,IO_L24N_5,I/O,IO_L24N_5,I/O,5
+W,19,9,W9,IO_L27N_5/VREF_5,VREF,IO_L27N_5/VREF_5,VREF,IO_L27N_5/VREF_5,VREF,IO_L27N_5/VREF_5,VREF,5
+W,19,10,W10,IO_L29P_5/VREF_5,VREF,IO_L29P_5/VREF_5,VREF,IO_L29P_5/VREF_5,VREF,IO_L29P_5/VREF_5,VREF,5
+W,19,11,W11,IO_L31N_5/D4,DUAL,IO_L31N_5/D4,DUAL,IO_L31N_5/D4,DUAL,IO_L31N_5/D4,DUAL,5
+W,19,12,W12,IO_L31N_4/INIT_B,DUAL,IO_L31N_4/INIT_B,DUAL,IO_L31N_4/INIT_B,DUAL,IO_L31N_4/INIT_B,DUAL,4
+W,19,13,W13,IO,I/O,IO,I/O,IO,I/O,IO,I/O,4
+W,19,14,W14,IO,I/O,IO,I/O,IO,I/O,IO,I/O,4
+W,19,15,W15,N.C.,N.C.,IO_L22P_4,I/O,IO_L22P_4,I/O,IO_L22P_4,I/O,4
+W,19,16,W16,IO_L16P_4,I/O,IO_L16P_4,I/O,IO_L16P_4,I/O,IO_L16P_4,I/O,4
+W,19,17,W17,IO_L10P_4,I/O,IO_L10P_4,I/O,IO_L10P_4,I/O,IO_L10P_4,I/O,4
+W,19,18,W18,IO_L06N_4/VREF_4,VREF,IO_L06N_4/VREF_4,VREF,IO_L06N_4/VREF_4,VREF,IO_L06N_4/VREF_4,VREF,4
+W,19,19,W19,IO_L17P_3/VREF_3,VREF,IO_L17P_3/VREF_3,VREF,IO_L17P_3/VREF_3,VREF,IO_L17P_3/VREF_3,VREF,3
+W,19,20,W20,IO_L19P_3,I/O,IO_L19P_3,I/O,IO_L19P_3,I/O,IO_L19P_3,I/O,3
+W,19,21,W21,IO_L19N_3,I/O,IO_L19N_3,I/O,IO_L19N_3,I/O,IO_L19N_3,I/O,3
+W,19,22,W22,IO_L16N_3,I/O,IO_L16N_3,I/O,IO_L16N_3,I/O,IO_L16N_3,I/O,3
+Y,20,1,Y1,IO,I/O,IO,I/O,IO,I/O,IO,I/O,6
+Y,20,2,Y2,IO_L01P_6/VRN_6,DCI,IO_L01P_6/VRN_6,DCI,IO_L01P_6/VRN_6,DCI,IO_L01P_6/VRN_6,DCI,6
+Y,20,3,Y3,IO_L01N_6/VRP_6,DCI,IO_L01N_6/VRP_6,DCI,IO_L01N_6/VRP_6,DCI,IO_L01N_6/VRP_6,DCI,6
+Y,20,4,Y4,IO_L01N_5/RDWR_B,DUAL,IO_L01N_5/RDWR_B,DUAL,IO_L01N_5/RDWR_B,DUAL,IO_L01N_5/RDWR_B,DUAL,5
+Y,20,5,Y5,IO_L09N_5,I/O,IO_L09N_5,I/O,IO_L09N_5,I/O,IO_L09N_5,I/O,5
+Y,20,6,Y6,IO_L16P_5,I/O,IO_L16P_5,I/O,IO_L16P_5,I/O,IO_L16P_5,I/O,5
+Y,20,7,Y7,N.C.,N.C.,IO_L19N_5,I/O,IO_L19N_5,I/O,IO_L19N_5,I/O,5
+Y,20,8,Y8,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,VCCO_5,VCCO,5
+Y,20,9,Y9,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+Y,20,10,Y10,IO_L29N_5,I/O,IO_L29N_5,I/O,IO_L29N_5,I/O,IO_L29N_5,I/O,5
+Y,20,11,Y11,IO_L32P_5/GCLK2,GCLK,IO_L32P_5/GCLK2,GCLK,IO_L32P_5/GCLK2,GCLK,IO_L32P_5/GCLK2,GCLK,5
+Y,20,12,Y12,IO_L31P_4/DOUT/BUSY,DUAL,IO_L31P_4/DOUT/BUSY,DUAL,IO_L31P_4/DOUT/BUSY,DUAL,IO_L31P_4/DOUT/BUSY,DUAL,4
+Y,20,13,Y13,IO_L29N_4,I/O,IO_L29N_4,I/O,IO_L29N_4,I/O,IO_L29N_4,I/O,4
+Y,20,14,Y14,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+Y,20,15,Y15,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,VCCO_4,VCCO,4
+Y,20,16,Y16,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+Y,20,17,Y17,IO_L15N_4,I/O,IO_L15N_4,I/O,IO_L15N_4,I/O,IO_L15N_4,I/O,4
+Y,20,18,Y18,IO_L06P_4,I/O,IO_L06P_4,I/O,IO_L06P_4,I/O,IO_L06P_4,I/O,4
+Y,20,19,Y19,IO_L01P_3/VRN_3,DCI,IO_L01P_3/VRN_3,DCI,IO_L01P_3/VRN_3,DCI,IO_L01P_3/VRN_3,DCI,3
+Y,20,20,Y20,IO_L01N_3/VRP_3,DCI,IO_L01N_3/VRP_3,DCI,IO_L01N_3/VRP_3,DCI,IO_L01N_3/VRP_3,DCI,3
+Y,20,21,Y21,IO,I/O,IO,I/O,IO,I/O,IO,I/O,3
+Y,20,22,Y22,IO_L16P_3,I/O,IO_L16P_3,I/O,IO_L16P_3,I/O,IO_L16P_3,I/O,3
+AA,21,1,AA1,M1,CONFIG,M1,CONFIG,M1,CONFIG,M1,CONFIG,VCCAUX
+AA,21,2,AA2,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+AA,21,3,AA3,IO_L01P_5/CS_B,DUAL,IO_L01P_5/CS_B,DUAL,IO_L01P_5/CS_B,DUAL,IO_L01P_5/CS_B,DUAL,5
+AA,21,4,AA4,IO_L06P_5,I/O,IO_L06P_5,I/O,IO_L06P_5,I/O,IO_L06P_5,I/O,5
+AA,21,5,AA5,IO_L10P_5/VRN_5,DCI,IO_L10P_5/VRN_5,DCI,IO_L10P_5/VRN_5,DCI,IO_L10P_5/VRN_5,DCI,5
+AA,21,6,AA6,IO_L16N_5,I/O,IO_L16N_5,I/O,IO_L16N_5,I/O,IO_L16N_5,I/O,5
+AA,21,7,AA7,N.C.,N.C.,IO_L22P_5,I/O,IO_L22P_5,I/O,IO_L22P_5,I/O,5
+AA,21,8,AA8,IO_L25P_5,I/O,IO_L25P_5,I/O,IO_L25P_5,I/O,IO_L25P_5,I/O,5
+AA,21,9,AA9,IO_L28P_5/D7,DUAL,IO_L28P_5/D7,DUAL,IO_L28P_5/D7,DUAL,IO_L28P_5/D7,DUAL,5
+AA,21,10,AA10,IO_L30P_5,I/O,IO_L30P_5,I/O,IO_L30P_5,I/O,IO_L30P_5,I/O,5
+AA,21,11,AA11,IO_L32N_5/GCLK3,GCLK,IO_L32N_5/GCLK3,GCLK,IO_L32N_5/GCLK3,GCLK,IO_L32N_5/GCLK3,GCLK,5
+AA,21,12,AA12,IO_L32N_4/GCLK1,GCLK,IO_L32N_4/GCLK1,GCLK,IO_L32N_4/GCLK1,GCLK,IO_L32N_4/GCLK1,GCLK,4
+AA,21,13,AA13,IO_L29P_4,I/O,IO_L29P_4,I/O,IO_L29P_4,I/O,IO_L29P_4,I/O,4
+AA,21,14,AA14,IO_L27N_4/DIN/D0,DUAL,IO_L27N_4/DIN/D0,DUAL,IO_L27N_4/DIN/D0,DUAL,IO_L27N_4/DIN/D0,DUAL,4
+AA,21,15,AA15,IO_L24N_4,I/O,IO_L24N_4,I/O,IO_L24N_4,I/O,IO_L24N_4,I/O,4
+AA,21,16,AA16,N.C.,N.C.,IO_L19N_4,I/O,IO_L19N_4,I/O,IO_L19N_4,I/O,4
+AA,21,17,AA17,IO_L15P_4,I/O,IO_L15P_4,I/O,IO_L15P_4,I/O,IO_L15P_4,I/O,4
+AA,21,18,AA18,IO_L09N_4,I/O,IO_L09N_4,I/O,IO_L09N_4,I/O,IO_L09N_4,I/O,4
+AA,21,19,AA19,N.C.,N.C.,IO_L05N_4,I/O,IO_L05N_4,I/O,IO_L05N_4,I/O,4
+AA,21,20,AA20,IO_L01N_4/VRP_4,DCI,IO_L01N_4/VRP_4,DCI,IO_L01N_4/VRP_4,DCI,IO_L01N_4/VRP_4,DCI,4
+AA,21,21,AA21,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+AA,21,22,AA22,CCLK,CONFIG,CCLK,CONFIG,CCLK,CONFIG,CCLK,CONFIG,VCCAUX
+AB,22,1,AB1,GND,GND,GND,GND,GND,GND,GND,GND,N/A
+AB,22,2,AB2,M0,CONFIG,M0,CONFIG,M0,CONFIG,M0,CONFIG,VCCAUX
+AB,22,3,AB3,M2,CONFIG,M2,CONFIG,M2,CONFIG,M2,CONFIG,VCCAUX
+AB,22,4,AB4,IO_L06N_5,I/O,IO_L06N_5,I/O,IO_L06N_5,I/O,IO_L06N_5,I/O,5
+AB,22,5,AB5,IO_L10N_5/VRP_5,DCI,IO_L10N_5/VRP_5,DCI,IO_L10N_5/VRP_5,DCI,IO_L10N_5/VRP_5,DCI,5
+AB,22,6,AB6,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+AB,22,7,AB7,N.C.,N.C.,IO_L22N_5,I/O,IO_L22N_5,I/O,IO_L22N_5,I/O,5
+AB,22,8,AB8,IO_L25N_5,I/O,IO_L25N_5,I/O,IO_L25N_5,I/O,IO_L25N_5,I/O,5
+AB,22,9,AB9,IO_L28N_5/D6,DUAL,IO_L28N_5/D6,DUAL,IO_L28N_5/D6,DUAL,IO_L28N_5/D6,DUAL,5
+AB,22,10,AB10,IO_L30N_5,I/O,IO_L30N_5,I/O,IO_L30N_5,I/O,IO_L30N_5,I/O,5
+AB,22,11,AB11,IO/VREF_5,VREF,IO/VREF_5,VREF,IO/VREF_5,VREF,IO/VREF_5,VREF,5
+AB,22,12,AB12,IO_L32P_4/GCLK0,GCLK,IO_L32P_4/GCLK0,GCLK,IO_L32P_4/GCLK0,GCLK,IO_L32P_4/GCLK0,GCLK,4
+AB,22,13,AB13,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,IO/VREF_4,VREF,4
+AB,22,14,AB14,IO_L27P_4/D1,DUAL,IO_L27P_4/D1,DUAL,IO_L27P_4/D1,DUAL,IO_L27P_4/D1,DUAL,4
+AB,22,15,AB15,IO_L24P_4,I/O,IO_L24P_4,I/O,IO_L24P_4,I/O,IO_L24P_4,I/O,4
+AB,22,16,AB16,N.C.,N.C.,IO_L19P_4,I/O,IO_L19P_4,I/O,IO_L19P_4,I/O,4
+AB,22,17,AB17,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,VCCAUX,N/A
+AB,22,18,AB18,IO_L09P_4,I/O,IO_L09P_4,I/O,IO_L09P_4,I/O,IO_L09P_4,I/O,4
+AB,22,19,AB19,N.C.,N.C.,IO_L05P_4,I/O,IO_L05P_4,I/O,IO_L05P_4,I/O,4
+AB,22,20,AB20,IO_L01P_4/VRN_4,DCI,IO_L01P_4/VRN_4,DCI,IO_L01P_4/VRN_4,DCI,IO_L01P_4/VRN_4,DCI,4
+AB,22,21,AB21,DONE,CONFIG,DONE,CONFIG,DONE,CONFIG,DONE,CONFIG,VCCAUX
+AB,22,22,AB22,GND,GND,GND,GND,GND,GND,GND,GND,N/A

Added: usrp-hw/trunk/sym/xilinx/xilinxgen1136
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen1136                              (rev 0)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen1136      2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,127 @@
+#!/usr/bin/python
+
+import re
+matchstr = re.compile("_")
+
+def writepin(file,number,name,linetype,pintype,pos):
+    #newname = matchstr.sub("\\_",name)
+    newname = name
+    file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % 
(number,pintype,linetype,pos,newname))
+
+pinfile = open ('XC3SD3400AFG676.csv','r')
+
+boilerplate = '''
+[options]
+wordswap=yes
+rotate_labels=yes
+sort_labels=yes
+generate_pinseq=yes
+sym_width=6000
+pinwidthvertikal=400
+pinwidthhorizontal=400
+[geda_attr]
+version=20060906
+name=XC3SD3400AFG676-%s
+device=XC3SD3400AFG676
+refdes=U?
+footprint=FG676
+description=Xilinx Spartan 3A-DSP 1800/3400 FG676
+documentation=http://www.xilinx.com
+author=xilinxgen.py
+numslots=0
+[pins]
+'''
+
+configfile = open ('xc3sd3400afg676-CFG.src', 'w')
+configfile.write(boilerplate % ("CFG",))
+
+jtagfile = open ('xc3sd3400afg676-JTAG.src', 'w')
+jtagfile.write(boilerplate % ("JTAG",))
+powerfile = open ('xc3sd3400afg676-PWR.src', 'w')
+powerfile.write(boilerplate % ("PWR",))
+topclockfile = open ('xc3sd3400afg676-TOPCLK.src', 'w')
+topclockfile.write(boilerplate % ("TOPCLK",))
+botclockfile = open ('xc3sd3400afg676-BOTCLK.src', 'w')
+botclockfile.write(boilerplate % ("BOTCLK",))
+lhclockfile = open ('xc3sd3400afg676-LHCLK.src', 'w')
+lhclockfile.write(boilerplate % ("LHCLK",))
+rhclockfile = open ('xc3sd3400afg676-RHCLK.src', 'w')
+rhclockfile.write(boilerplate % ("RHCLK",))
+
+iofiles = [0] * 4
+for i in range(4):
+    iofiles[i] = open ( ('xc3sd3400afg676-IO%d.src' % (i,)), 'w')
+    iofiles[i].write(boilerplate % ('IO%d' % (i,),))
+    
+dummy = pinfile.readline()
+lines = pinfile.readlines()
+
+for line in lines:
+    elements = line.strip().split(',')
+
+    pintype = elements[3]
+    #nc = elements[5] == "N.C."
+
+    #if(elements[5] != elements[9]) and not nc:
+    #    print "error"
+    #    print elements
+
+    #if nc and pintype != 'I/O' and pintype != 'VREF':
+    #    print "error"
+    #    print elements
+    
+    if(pintype == 'GND'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','r')
+    elif(pintype == 'VCCAUX'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+    elif(pintype == 'VCCO'):
+        #writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','pwr','b')
+    elif(pintype == 'VCCINT'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+
+    elif(pintype == 'JTAG'):
+        writepin(jtagfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'CONFIG'):
+        #writepin(configfile,elements[0],elements[1],'line','io','b')
+        writepin(configfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'PWRMGMT'):
+        #writepin(configfile,elements[0],elements[1],'line','io','b')
+        writepin(configfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'DUAL'):
+        if(int(elements[2]) == 1):   # All these are for BPI mode, so just put 
in bank 1
+            
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+        elif(int(elements[2]) == 2):
+            writepin(configfile,elements[0],elements[1],'line','io','r')
+        else:
+            writepin(configfile,elements[0],elements[1],'line','io','l')
+            
+    elif(pintype == 'GCLK'):
+        if(int(elements[2]) == 0):
+            writepin(topclockfile,elements[0],elements[1],'clk','clk','l')
+        else:
+            writepin(botclockfile,elements[0],elements[1],'clk','clk','l')
+            
+    elif(pintype == 'LHCLK'):
+        writepin(lhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'RHCLK'):
+        writepin(rhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'VREF'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','r')
+
+    elif(pintype == 'I/O'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'INPUT'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','in','r')
+
+    elif(pintype == 'DCI'):
+        writepin(iofiles[int(elements[12])],elements[3],"%s/DCI" % 
(elements[6],),'line','io','l')
+
+    else:
+        print elements


Property changes on: usrp-hw/trunk/sym/xilinx/xilinxgen1136
___________________________________________________________________
Name: svn:executable
   + *

Copied: usrp-hw/trunk/sym/xilinx/xilinxgen320 (from rev 10171, 
usrp-hw/trunk/sym/generated/xilinxgen320)
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen320                               (rev 0)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen320       2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,106 @@
+#!/usr/bin/python
+
+import re
+matchstr = re.compile("_")
+
+def writepin(file,number,name,linetype,pintype,pos):
+    #newname = matchstr.sub("\\_",name)
+    #file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % 
(number,pintype,linetype,pos,newname))
+    file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % (number,pintype,linetype,pos,name))
+
+pinfile = open ('fg320_table.csv','r')
+
+boilerplate = '''
+[options]
+wordswap=yes
+rotate_labels=yes
+sort_labels=yes
+generate_pinseq=yes
+sym_width=3200
+pinwidthvertikal=400
+pinwidthhorizontal=400
+[geda_attr]
+version=20060906
+name=XC3SXX00FG320-%s
+device=XC3SXX00FG320
+refdes=U?
+footprint=FG320
+description=Xilinx Spartan 3 400/1000/1500 FG320
+documentation=http://www.xilinx.com
+author=xilinxgen.py
+numslots=0
+[pins]
+'''
+
+configfile = open ('xc3sXX00fg320-CFG.src', 'w')
+configfile.write(boilerplate % ("CFG",))
+
+jtagfile = open ('xc3sXX00fg320-JTAG.src', 'w')
+jtagfile.write(boilerplate % ("JTAG",))
+powerfile = open ('xc3sXX00fg320-PWR.src', 'w')
+powerfile.write(boilerplate % ("PWR",))
+clockfile = open ('xc3sXX00fg320-CLK.src', 'w')
+clockfile.write(boilerplate % ("CLK",))
+
+iofiles = [0] * 8
+for i in range(8):
+    iofiles[i] = open ( ('xc3sXX00fg320-IO%d.src' % (i,)), 'w')
+    iofiles[i].write(boilerplate % ('IO%d' % (i,),))
+    
+dummy = pinfile.readline()
+lines = pinfile.readlines()
+
+for line in lines:
+    elements = line.strip().split(',')
+
+    pintype = elements[6]
+    nc = elements[4] == "N.C."
+
+    if(elements[4] != elements[8]) and not nc:
+        print "error"
+        print elements
+
+    if nc and pintype != 'I/O' and pintype != 'VREF':
+        print "error"
+        print elements
+    
+
+    if(pintype == 'GND'):
+        writepin(powerfile,elements[2],elements[5],'line','pwr','r')
+    elif(pintype == 'VCCAUX'):
+        writepin(powerfile,elements[2],elements[5],'line','pwr','l')
+    elif(pintype == 'VCCO'):
+        #writepin(powerfile,elements[2],elements[5],'line','pwr','l')
+        
writepin(iofiles[int(elements[9])],elements[2],elements[5],'line','pwr','b')
+    elif(pintype == 'VCCINT'):
+        writepin(powerfile,elements[2],elements[5],'line','pwr','l')
+
+    elif(pintype == 'JTAG'):
+        writepin(jtagfile,elements[2],elements[5],'line','io','l')
+
+    elif(pintype == 'CONFIG'):
+        writepin(configfile,elements[2],elements[5],'line','io','l')
+
+    elif(pintype == 'DUAL'):
+        writepin(configfile,elements[2],elements[5],'line','io','r')
+
+    elif(pintype == 'GCLK'):
+        writepin(clockfile,elements[2],elements[5],'clk','clk','l')
+
+    elif(pintype == 'VREF'):
+        if nc:
+            writepin(iofiles[int(elements[9])],elements[2],"%s/400NC" % 
(elements[5],),'line','io','r')
+        else:
+            
writepin(iofiles[int(elements[9])],elements[2],elements[5],'line','io','r')
+
+    elif(pintype == 'I/O'):
+        if nc:
+            writepin(iofiles[int(elements[9])],elements[2],"%s/400NC" % 
(elements[5],),'line','io','r')
+        else:
+            
writepin(iofiles[int(elements[9])],elements[2],elements[5],'line','io','l')
+
+    elif(pintype == 'DCI'):
+        writepin(iofiles[int(elements[9])],elements[2],"%s/DCI" % 
(elements[5],),'line','io','l')
+
+    else:
+        print elements

Copied: usrp-hw/trunk/sym/xilinx/xilinxgen456 (from rev 10171, 
usrp-hw/trunk/sym/generated/xilinxgen456)
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen456                               (rev 0)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen456       2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,106 @@
+#!/usr/bin/python
+
+import re
+matchstr = re.compile("_")
+
+def writepin(file,number,name,linetype,pintype,pos):
+    #newname = matchstr.sub("\\_",name)
+    newname = name
+    file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % 
(number,pintype,linetype,pos,newname))
+
+pinfile = open ('fg456_table.csv','r')
+
+boilerplate = '''
+[options]
+wordswap=yes
+rotate_labels=yes
+sort_labels=yes
+generate_pinseq=yes
+sym_width=3200
+pinwidthvertikal=400
+pinwidthhorizontal=400
+[geda_attr]
+version=20060906
+name=XC3SXX00FG456-%s
+device=XC3SXX00FG456
+refdes=U?
+footprint=FG456
+description=Xilinx Spartan 3 400/1000/1500/2000 FG456
+documentation=http://www.xilinx.com
+author=xilinxgen.py
+numslots=0
+[pins]
+'''
+
+configfile = open ('xc3sXX00fg456-CFG.src', 'w')
+configfile.write(boilerplate % ("CFG",))
+
+jtagfile = open ('xc3sXX00fg456-JTAG.src', 'w')
+jtagfile.write(boilerplate % ("JTAG",))
+powerfile = open ('xc3sXX00fg456-PWR.src', 'w')
+powerfile.write(boilerplate % ("PWR",))
+clockfile = open ('xc3sXX00fg456-CLK.src', 'w')
+clockfile.write(boilerplate % ("CLK",))
+
+iofiles = [0] * 8
+for i in range(8):
+    iofiles[i] = open ( ('xc3sXX00fg456-IO%d.src' % (i,)), 'w')
+    iofiles[i].write(boilerplate % ('IO%d' % (i,),))
+    
+dummy = pinfile.readline()
+lines = pinfile.readlines()
+
+for line in lines:
+    elements = line.strip().split(',')
+
+    pintype = elements[7]
+    nc = elements[5] == "N.C."
+
+    if(elements[5] != elements[9]) and not nc:
+        print "error"
+        print elements
+
+    if nc and pintype != 'I/O' and pintype != 'VREF':
+        print "error"
+        print elements
+    
+
+    if(pintype == 'GND'):
+        writepin(powerfile,elements[3],elements[6],'line','pwr','r')
+    elif(pintype == 'VCCAUX'):
+        writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+    elif(pintype == 'VCCO'):
+        #writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+        
writepin(iofiles[int(elements[12])],elements[3],elements[6],'line','pwr','b')
+    elif(pintype == 'VCCINT'):
+        writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+
+    elif(pintype == 'JTAG'):
+        writepin(jtagfile,elements[3],elements[6],'line','io','l')
+
+    elif(pintype == 'CONFIG'):
+        writepin(configfile,elements[3],elements[6],'line','io','l')
+
+    elif(pintype == 'DUAL'):
+        writepin(configfile,elements[3],elements[6],'line','io','r')
+
+    elif(pintype == 'GCLK'):
+        writepin(clockfile,elements[3],elements[6],'clk','clk','l')
+
+    elif(pintype == 'VREF'):
+        if nc:
+            writepin(iofiles[int(elements[12])],elements[3],"%s/400NC" % 
(elements[6],),'line','io','r')
+        else:
+            
writepin(iofiles[int(elements[12])],elements[3],elements[6],'line','io','r')
+
+    elif(pintype == 'I/O'):
+        if nc:
+            writepin(iofiles[int(elements[12])],elements[3],"%s/400NC" % 
(elements[6],),'line','io','r')
+        else:
+            
writepin(iofiles[int(elements[12])],elements[3],elements[6],'line','io','l')
+
+    elif(pintype == 'DCI'):
+        writepin(iofiles[int(elements[12])],elements[3],"%s/DCI" % 
(elements[6],),'line','io','l')
+
+    else:
+        print elements

Copied: usrp-hw/trunk/sym/xilinx/xilinxgen484 (from rev 10171, 
usrp-hw/trunk/sym/generated/xilinxgen484)
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen484                               (rev 0)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen484       2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,125 @@
+#!/usr/bin/python
+
+import re
+matchstr = re.compile("_")
+
+def writepin(file,number,name,linetype,pintype,pos):
+    #newname = matchstr.sub("\\_",name)
+    newname = name
+    file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % 
(number,pintype,linetype,pos,newname))
+
+pinfile = open ('XC3SD1800ACS484.csv','r')
+
+boilerplate = '''
+[options]
+wordswap=yes
+rotate_labels=yes
+sort_labels=yes
+generate_pinseq=yes
+sym_width=3200
+pinwidthvertikal=400
+pinwidthhorizontal=400
+[geda_attr]
+version=20060906
+name=XC3SD1800ACS484-%s
+device=XC3SD1800ACS484
+refdes=U?
+footprint=CS484
+description=Xilinx Spartan 3A-DSP 1800 CS484
+documentation=http://www.xilinx.com
+author=xilinxgen.py
+numslots=0
+[pins]
+'''
+
+configfile = open ('xc3sd1800acs484-CFG.src', 'w')
+configfile.write(boilerplate % ("CFG",))
+
+jtagfile = open ('xc3sd1800acs484-JTAG.src', 'w')
+jtagfile.write(boilerplate % ("JTAG",))
+powerfile = open ('xc3sd1800acs484-PWR.src', 'w')
+powerfile.write(boilerplate % ("PWR",))
+topclockfile = open ('xc3sd1800acs484-TOPCLK.src', 'w')
+topclockfile.write(boilerplate % ("TOPCLK",))
+botclockfile = open ('xc3sd1800acs484-BOTCLK.src', 'w')
+botclockfile.write(boilerplate % ("BOTCLK",))
+lhclockfile = open ('xc3sd1800acs484-LHCLK.src', 'w')
+lhclockfile.write(boilerplate % ("LHCLK",))
+rhclockfile = open ('xc3sd1800acs484-RHCLK.src', 'w')
+rhclockfile.write(boilerplate % ("RHCLK",))
+
+iofiles = [0] * 4
+for i in range(4):
+    iofiles[i] = open ( ('xc3sd1800acs484-IO%d.src' % (i,)), 'w')
+    iofiles[i].write(boilerplate % ('IO%d' % (i,),))
+    
+dummy = pinfile.readline()
+lines = pinfile.readlines()
+
+for line in lines:
+    elements = line.strip().split(',')
+
+    pintype = elements[3]
+    #nc = elements[5] == "N.C."
+
+    #if(elements[5] != elements[9]) and not nc:
+    #    print "error"
+    #    print elements
+
+    #if nc and pintype != 'I/O' and pintype != 'VREF':
+    #    print "error"
+    #    print elements
+    
+    if(pintype == 'GND'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','r')
+    elif(pintype == 'VCCAUX'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+    elif(pintype == 'VCCO'):
+        #writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','pwr','b')
+    elif(pintype == 'VCCINT'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+
+    elif(pintype == 'JTAG'):
+        writepin(jtagfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'CONFIG'):
+        writepin(configfile,elements[0],elements[1],'line','io','b')
+
+    elif(pintype == 'PWRMGMT'):
+        writepin(configfile,elements[0],elements[1],'line','io','b')
+
+    elif(pintype == 'DUAL'):
+        if(int(elements[2]) == 1):   # All these are for BPI mode, so just put 
in bank 1
+            
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+        elif(int(elements[2]) == 2):
+            writepin(configfile,elements[0],elements[1],'line','io','r')
+        else:
+            writepin(configfile,elements[0],elements[1],'line','io','l')
+            
+    elif(pintype == 'GCLK'):
+        if(int(elements[2]) == 0):
+            writepin(topclockfile,elements[0],elements[1],'clk','clk','l')
+        else:
+            writepin(botclockfile,elements[0],elements[1],'clk','clk','l')
+            
+    elif(pintype == 'LHCLK'):
+        writepin(lhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'RHCLK'):
+        writepin(rhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'VREF'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','r')
+
+    elif(pintype == 'I/O'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'INPUT'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','in','r')
+
+    elif(pintype == 'DCI'):
+        writepin(iofiles[int(elements[12])],elements[3],"%s/DCI" % 
(elements[6],),'line','io','l')
+
+    else:
+        print elements

Copied: usrp-hw/trunk/sym/xilinx/xilinxgen676 (from rev 10171, 
usrp-hw/trunk/sym/generated/xilinxgen676)
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen676                               (rev 0)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen676       2009-01-12 22:39:36 UTC (rev 
10209)
@@ -0,0 +1,127 @@
+#!/usr/bin/python
+
+import re
+matchstr = re.compile("_")
+
+def writepin(file,number,name,linetype,pintype,pos):
+    #newname = matchstr.sub("\\_",name)
+    newname = name
+    file.write("%s\t\t%s\t%s\t%s\t\t%s\n" % 
(number,pintype,linetype,pos,newname))
+
+pinfile = open ('XC3SD3400AFG676.csv','r')
+
+boilerplate = '''
+[options]
+wordswap=yes
+rotate_labels=yes
+sort_labels=yes
+generate_pinseq=yes
+sym_width=6000
+pinwidthvertikal=400
+pinwidthhorizontal=400
+[geda_attr]
+version=20060906
+name=XC3SD3400AFG676-%s
+device=XC3SD3400AFG676
+refdes=U?
+footprint=FG676
+description=Xilinx Spartan 3A-DSP 1800/3400 FG676
+documentation=http://www.xilinx.com
+author=xilinxgen.py
+numslots=0
+[pins]
+'''
+
+configfile = open ('xc3sd3400afg676-CFG.src', 'w')
+configfile.write(boilerplate % ("CFG",))
+
+jtagfile = open ('xc3sd3400afg676-JTAG.src', 'w')
+jtagfile.write(boilerplate % ("JTAG",))
+powerfile = open ('xc3sd3400afg676-PWR.src', 'w')
+powerfile.write(boilerplate % ("PWR",))
+topclockfile = open ('xc3sd3400afg676-TOPCLK.src', 'w')
+topclockfile.write(boilerplate % ("TOPCLK",))
+botclockfile = open ('xc3sd3400afg676-BOTCLK.src', 'w')
+botclockfile.write(boilerplate % ("BOTCLK",))
+lhclockfile = open ('xc3sd3400afg676-LHCLK.src', 'w')
+lhclockfile.write(boilerplate % ("LHCLK",))
+rhclockfile = open ('xc3sd3400afg676-RHCLK.src', 'w')
+rhclockfile.write(boilerplate % ("RHCLK",))
+
+iofiles = [0] * 4
+for i in range(4):
+    iofiles[i] = open ( ('xc3sd3400afg676-IO%d.src' % (i,)), 'w')
+    iofiles[i].write(boilerplate % ('IO%d' % (i,),))
+    
+dummy = pinfile.readline()
+lines = pinfile.readlines()
+
+for line in lines:
+    elements = line.strip().split(',')
+
+    pintype = elements[3]
+    #nc = elements[5] == "N.C."
+
+    #if(elements[5] != elements[9]) and not nc:
+    #    print "error"
+    #    print elements
+
+    #if nc and pintype != 'I/O' and pintype != 'VREF':
+    #    print "error"
+    #    print elements
+    
+    if(pintype == 'GND'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','r')
+    elif(pintype == 'VCCAUX'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+    elif(pintype == 'VCCO'):
+        #writepin(powerfile,elements[3],elements[6],'line','pwr','l')
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','pwr','b')
+    elif(pintype == 'VCCINT'):
+        writepin(powerfile,elements[0],elements[1],'line','pwr','l')
+
+    elif(pintype == 'JTAG'):
+        writepin(jtagfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'CONFIG'):
+        #writepin(configfile,elements[0],elements[1],'line','io','b')
+        writepin(configfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'PWRMGMT'):
+        #writepin(configfile,elements[0],elements[1],'line','io','b')
+        writepin(configfile,elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'DUAL'):
+        if(int(elements[2]) == 1):   # All these are for BPI mode, so just put 
in bank 1
+            
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+        elif(int(elements[2]) == 2):
+            writepin(configfile,elements[0],elements[1],'line','io','r')
+        else:
+            writepin(configfile,elements[0],elements[1],'line','io','l')
+            
+    elif(pintype == 'GCLK'):
+        if(int(elements[2]) == 0):
+            writepin(topclockfile,elements[0],elements[1],'clk','clk','l')
+        else:
+            writepin(botclockfile,elements[0],elements[1],'clk','clk','l')
+            
+    elif(pintype == 'LHCLK'):
+        writepin(lhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'RHCLK'):
+        writepin(rhclockfile,elements[0],elements[1],'clk','clk','l')
+
+    elif(pintype == 'VREF'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','r')
+
+    elif(pintype == 'I/O'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
+
+    elif(pintype == 'INPUT'):
+        
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','in','r')
+
+    elif(pintype == 'DCI'):
+        writepin(iofiles[int(elements[12])],elements[3],"%s/DCI" % 
(elements[6],),'line','io','l')
+
+    else:
+        print elements





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