I am looking at the serial_io.v verilog module. It is my understanding that this module gets an address and data serially through the SDI input and sets some FPGA registers according to that input. Is the purpose of having such module to control some parameters directly from software such as 'interpolation rate' , 'ADC offset' ... ?
Also, I am not sure about the origin of master_clock? is that clock on the USRP or is it a signal coming from the FX2 chip?