Re: [Discuss-gnuradio] AD9862 Functionality

[Brian Padalino]

So to just figure out the different decimations/interpolation rates we have:

ADC samples at 64MHz, and passes through both I and Q channels over
the 24-bit RX bus.  Internal to the FPGA, the CIC automatically
decimates by a value of at least 4.  The halfband decimating FIR
internal to the FPGA decimates by a fixed value of 2.

This gives a minimum decimation rate of 8, leaving 8Msps going over
the USB of the USRP.  Is this correct?

The data being clocked out of the USRP is at 64Msps.  There are two
points that interpolation can happen - inside the AD9862 and internal
to the FPGA.  Within the FPGA, the CIC filter is the interpolating
structure and has a variable rate, whereas the AD9862 has a fixed
interpolation rate of 2x if a real-only signal is being used, or 4x is
possible if interleaved with I/Q at 64Msps - giving the sample rate of
I/Q 32Msps.

Is that correct so far?

I am unsure what the minimum interpolating rate of the CIC is, or the
maximum for that matter.  Can anyone answer?

Who sets the interpolation rate of the CIC internal to the FPGA to get
from the specified number of samples per symbol from a modulator block
in GNU Radio to a number that the CIC can interpolate into 64Msps?  Or
is a modulator block required to do things in powers of 2 when
connected to a USRP?

Thanks,
Brian