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Re: [Discuss-gnuradio] Help with Cordic.v


From: Matt Ettus
Subject: Re: [Discuss-gnuradio] Help with Cordic.v
Date: Sun, 25 Nov 2007 21:38:46 +0000

> Q -- Not sure what "wire [bitwidth+1:0] xi_ext =
> {{2{xi[bitwidth-1]}},xi};" statement is doing. Is it just normal
> concatenation and assignment?

Yes, we are sign-extending xi.
 
> Now, @posedge  clock, if reset is set, then x0, y0, z0 is initialized
> to '0'.  Next, when enable is set, z0 is assigned all bits except the
> first two. And the first 2 bits are used for the case statement.
> 
> Q -- My understanding is that in this case statements, the first 2
> bits are used to determine the quadrants and accordingly adjust the
> quadrant (angle) for  xi_ext and yi_ext by 90 or 180 or 270 or 360
> degree.. But I am not sure. Any comments ?

yes
 
> Q -- I am not sure what "#(bitwidth+2,zwidth-1,0)" in this instance
> definition does. My understanding is that  # value is used to define
> some delay.

#() is used to pass parameters to the module being instantiated.

> Q -- This statement checks if "z_is_pos" and does next operation
> respectively. I am not sure what "xi -
> {{shift+1{yi[bitwidth-1]}},yi[bitwidth-2:shift]}" is actually doing.
> My understanding of cordic is that based on angle adjustments,
> operations of multiples of 2 are carried out on x-axis and y-axis
> variable. And {} statement are used for concatenation in verilog.

Sign extension

> 
> Again, in cordic.v
> ---------------------------
> xo, yo and zo are in continuous assignment mode and are updated
> everytime a x12, y12 or z12 value changes respectively.
> 
> Q – Not exactly sure how the exact desired angle is obtained in
> cordic.v. The algorithm that I read, made continous adjustments on
> 'current angle' so that it converged to the desired angle. I don't see
> that step happening in cordic.v

That is happening.  If the angle is positive, it is reduced.  If the angle is 
negative, it is increased.  It always gets closer to zero.

Matt






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