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Re: [Discuss-gnuradio] Routing and Placing and Clock for FPGA !
From: |
Brian Padalino |
Subject: |
Re: [Discuss-gnuradio] Routing and Placing and Clock for FPGA ! |
Date: |
Tue, 4 Dec 2007 20:54:41 -0500 |
On Dec 4, 2007 8:30 PM, Ronald Jetli <address@hidden> wrote:
> Hi,
>
> Needed to confirm a few things:
>
> 1) Is the global clock frequency for USRP 64Mhz ?
Yes. It's a fully synchronous design with FIFO boundaries where it
talks to the FX2 chip which runs at a different clock speed I believe.
> 2) Do we use this global clock frequency for FPGA on the USRP and not the
> FPGA's clock ? Because, I think the EP1C12Q240C8 FPGA runs at much higher
> clock speeds. So, we are using
> global clock to achieve synchronisation.
When the FPGA is routed, there isn't much more slack above the 64MHz
for Fmax (or so I thought). I am not sure what you mean when you
state the part runs much higher clock speeds.
What do you mean by synchronization? It is a little vague and ambiguous.
> 3) Also, is the automatic route and place tools provided by the Quartus
> software, being used for FPGA ? While compiling, I see that automatic place
> and routing is happening. But still wanted to confirm if that is true or is
> it being manually configured (for already compiled rbfs) to achieve higher
> efficiency.
Quartus does all the work when translating the RTL into a programming file.
Brian