[Discuss-gnuradio] USRP2 FPGA - Too many BRAMs during MAP in ISE 11.1

[Alan Zubatch]

Hello, 

I am trying to implement the USRP2 FPGA HDL using Xilinx ISE 11.1. I have
set-up the file structure and the project options per the makefile for
U2_rev3. It will synthesize and translate (39 BRAM) but fails map with
44BRAM. The BRAM usage at map failure is: 

Module       BRAM       Full Hierarchical Name
buffer_pool   8/8   u2_rev3/u2_core/buffer_pool 
regf          3/3   u2_rev3/u2_core/aeMB/aeMB_edk32/regf 
ram           2/2  
u2_rev3/u2_core/mac_rxfifo_int/mac_rx_longfifo/longfifo/ram 
ram           2/2   u2_rev3/u2_core/rx_control/rxfifo/longfifo/ram 
icache        2/2   u2_rev3/u2_core/sys_ram/icache 
ram           2/2   u2_rev3/u2_core/tx_control/txctrlfifo/longfifo/ram 
sys_ram       16/16 u2_rev3/u2_core/sys_ram/sys_ram 
v2_noinit.ram 1/1  
u2_rev3/u2_core/MAC_top/U_MAC_rx/U_MAC_rx_FF/mac_rx_ff_core/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v2_noinit.ram
v2_noinit.ram 1/1  
u2_rev3/u2_core/MAC_top/U_MAC_rx/U_MAC_rx_FF/mac_rx_ff_core/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[1].ram.r/v2_noinit.ram
v2_noinit.ram 1/1  
u2_rev3/u2_core/MAC_top/U_MAC_rx/U_MAC_rx_FF/mac_rx_ff_core/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[2].ram.r/v2_noinit.ram
v2_noinit.ram 1/1  
u2_rev3/u2_core/MAC_top/U_MAC_rx/U_MAC_rx_FF/mac_rx_ff_core/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[3].ram.r/v2_noinit.ram
mac_tx_ff_ram 1/1  
u2_rev3/u2_core/MAC_top/U_MAC_tx/U_MAC_tx_FF/mac_tx_ff_ram 
U_RMON        1/1   u2_rev3/u2_core/MAC_top/U_RMON 
v2_noinit.ram 1/1  
u2_rev3/u2_core/mac_txfifo_int/mac_tx_fifo_2clk/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v2_noinit.ram
mac_rx_ff_ram 1/1  
u2_rev3/u2_core/serdes/serdes_rx/serdes_rx_fifo/fifo_2clock/mac_rx_ff_ram 
ram           1/1  
u2_rev3/u2_core/serdes/serdes_tx/serdes_tx_fifo/longfifo/ram 

I suspect the v2_noinit.ram but am not sure where I went wrong to end up
with them.

Any help or ideas would be greatly appreciated.

Thanks,

Alan