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RE: [Discuss-gnuradio] strange receiver behaviour with UHD
From: |
Patrik Eliardsson |
Subject: |
RE: [Discuss-gnuradio] strange receiver behaviour with UHD |
Date: |
Wed, 29 Sep 2010 14:07:11 +0200 |
Thanks for all your replies!
We did some additional experiments where we divided our program into 2 phases.
In phase 1 we did all the initialization like setting rx rate, center
frequency, gain, synchronizing to ref clock, and finally issued a stream
command to receive samples. The received samples are then thrown away as you
suggested.
In phase 2 all the settings are already set so we issue a new stream command to
receive new samples. If we look at the abs value of these samples we still have
the same "spike" in the beginning of the collected set.
Our conclusion is that the stream command somehow introduce this "spike" so we
always need to receive more samples with the stream command and throw away the
beginning of the collected set. We also tried different stream modes
(STREAM_MODE_NUM_SAMPS_AND_DONE or STREAM_MODE_NUM_SAMPS_AND_MORE) but with the
same result.
Regards
- Patrik
> -----Original Message-----
> From:
> address@hidden
> [mailto:address@hidden
> org] On Behalf Of Per Zetterberg
> Sent: Tuesday, September 28, 2010 7:46 PM
> To: Marcus D. Leech
> Cc: address@hidden
> Subject: Re: [Discuss-gnuradio] strange receiver behaviour with UHD
>
> On Tue, 2010-09-28 at 13:34 -0400, Marcus D. Leech wrote:
> > >
> > > It's likely that initialization of the board gain and frequency
> > > settings will take some finite but non-zero amount of time to
> > > settle. It's always a good idea to toss the first few
> samples until
> > > things settle down. The settling time will be different for each
> > > daughterboard and should be experimentally determined in
> your application.
> > >
> > > --n
> > >
> > >
> > Yup, and I'd like to point out that this isn't just a
> "quirk" of this
> > particular hardware. All such hardware takes a finite
> amount of time
> > to "settle" -- the synthesizers often take a handful of
> milliseconds
> > to settle to their final value, and even VGA settings take
> finite time.
> >
> > The A/D has no way of knowing what that time is, so it
> starts sending
> > samples right away--those samples will contain "artifacts" of
> > whatever settling has to take place. Fact of life.
> >
> > I don't know how the filters in the FPGA are coded, but it also
> > wouldn't surprise me if they take some finite amount of
> time to converge
> > on correct output, since they'll have some indeterminate
> startup state.
> >
> >
>
> My experience is that it doesn't matter how long I wait after
> setting the gain and frequency.
>
>
> It could be FPGA filters.
>
> BR/
> Per
>
>
>
>
>
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