[Discuss-gnuradio] non-diff QPSK symbol sync, improper alignemnt/errors using real msg

[Landsman, Arik]

Hello Folks,

I am debugging a flowgraph of QPSK without diff encoding. The aim here is to tx messages between two N210's, as a starting point for a heterogeneous networking project. long story short, I am seeing an issue sending/receiving a real message within the same flow graph (just direct connection to the Rx portion)

Please read on..

The Tx msg is:
"00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4B 4B 4B 4B 20 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 20 20 4B 4B 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00"

where,
  "4B" is a rotating vector to allow costas to lock (not used here while in debug)
  "20 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 20 20" = "  Hello World  "
  "00" is just padding (I tried a psudo-random sequence instead, 4096 bits long on either side of msg, similar results)

the rx msg is (consistently across runs):
"C0 03 3C 3C 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 4B 4B 4B 13 10 48 98 DA D8 D8 13 A8 DB 3B D9 98 10 10 48 4B 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00"

Added 4bit delay to align the samples before the file sink. Note that "4B" is ok, but the 0x20 expected right after is typically passed as 0x10. rest of the msg is scrambled, consistently.

My signal chain is as follow:
file source -- const mod (see const object below) -- throttle (320k) -- Polyphase CS (or Clock Rec MM, same result) -- const soft decoder (using same const object) -- binary slicer / bit packing / file sink

const rect object:
  sym map: digital.psk_4()[1] // evals to [0,1,2,3]
  points: digital.psk_4()[0]     // evals to [(-1-1j), (1-1j), (-1+1j), (1+1j)]
  [..]
  Soft Decision LUT: 'auto'

Polyphase Clock
  sps: 8
  taps: firdes.root_raised_cosine(32, 32, 1.0, 0.5, int(5*sps*32))
  *rest is at default, LB = 2*3.14/100

excess bw = 0.5

when on repeat, the binary out of the soft decoder looks crisp, easy for binary slicer to decide.

not sure what RRC taps are used in the Const Mod block - maybe the RRC in the PPCS doesn't match. Seems close enough though, same as in similar examples that use the Const Mod block. again, decoded binary looks clean.

Few questions...

had anyone seen this before, i.e. dropped bits or incorrectly decoded symbols W/O using Costas?
any thoughts on new debug directions? the two active blocks are the Constel Mod and the PPCS (or MM, same result)
Did anyone in general try non diff-encoded QPSK transmission using a real message? Seems like diff encoding was laways ON while QA'ing the psk blocks. I haven't seen an example online as of yet (although plenty of good material that uses psudo-random)

Thank you in advance!

Arik Landsman