[Dotgnu-pnet-commits] CVS: pnet/engine arm_codegen.h, 1.3, 1.4 md_arm.h, 1.6, 1.7

[Rhys Weatherley <address@hidden>]

Update of /cvsroot/dotgnu-pnet/pnet/engine
In directory subversions:/tmp/cvs-serv24654/engine

Modified Files:
        arm_codegen.h md_arm.h 
Log Message:


Minor tweaks to ARM macros.


Index: arm_codegen.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/arm_codegen.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -r1.3 -r1.4
*** arm_codegen.h       11 Jul 2003 11:18:11 -0000      1.3
--- arm_codegen.h       12 Jul 2003 03:58:50 -0000      1.4
***************
*** 603,607 ****
                                                                                
 0x00400000); \
                        } while (0)
! #define       arm_store_membase_ubyte(inst,reg,basereg,imm)   \
                        do { \
                                arm_store_membase_byte((inst), (reg), 
(basereg), (imm)); \
--- 603,607 ----
                                                                                
 0x00400000); \
                        } while (0)
! #define       arm_store_membase_sbyte(inst,reg,basereg,imm)   \
                        do { \
                                arm_store_membase_byte((inst), (reg), 
(basereg), (imm)); \
***************
*** 696,700 ****
                                                                                
  (indexreg), 0, 0x00400000); \
                        } while (0)
! #define       arm_store_memindex_ubyte(inst,reg,basereg,indexreg)     \
                        do { \
                                arm_store_memindex_byte((inst), (reg), 
(basereg), \
--- 696,700 ----
                                                                                
  (indexreg), 0, 0x00400000); \
                        } while (0)
! #define       arm_store_memindex_sbyte(inst,reg,basereg,indexreg)     \
                        do { \
                                arm_store_memindex_byte((inst), (reg), 
(basereg), \

Index: md_arm.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/md_arm.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -C2 -r1.6 -r1.7
*** md_arm.h    11 Jul 2003 05:49:46 -0000      1.6
--- md_arm.h    12 Jul 2003 03:58:50 -0000      1.7
***************
*** 484,500 ****
  #define       md_cmp_reg_reg_word_32(inst,reg1,reg2)  \
                        do { \
!                               arm_test_reg_reg((inst), ARM_CMP, reg1, reg2); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, reg1, 0, 
1, ARM_CC_GT); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, reg1, 0, 
0, ARM_CC_LE); \
!                               arm_alu_reg_cond((inst), ARM_MVN, reg1, reg1, 
ARM_CC_LT); \
                        } while (0)
  #define       md_ucmp_reg_reg_word_32(inst,reg1,reg2) \
                        do { \
!                               arm_test_reg_reg((inst), ARM_CMP, reg1, reg2); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, reg1, 0, 
1, \
                                                                          
ARM_CC_GT_UN); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, reg1, 0, 
0, \
                                                                          
ARM_CC_LE_UN); \
!                               arm_alu_reg_cond((inst), ARM_MVN, reg1, reg1, \
                                                                 ARM_CC_LT_UN); 
\
                        } while (0)
--- 484,502 ----
  #define       md_cmp_reg_reg_word_32(inst,reg1,reg2)  \
                        do { \
!                               arm_test_reg_reg((inst), ARM_CMP, (reg1), 
(reg2)); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, (reg1), 
0, 1, \
!                                                                         
ARM_CC_GT); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, (reg1), 
0, 0, \
!                                                                         
ARM_CC_LE); \
!                               arm_alu_reg_cond((inst), ARM_MVN, (reg1), 
(reg1), ARM_CC_LT); \
                        } while (0)
  #define       md_ucmp_reg_reg_word_32(inst,reg1,reg2) \
                        do { \
!                               arm_test_reg_reg((inst), ARM_CMP, (reg1), 
(reg2)); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, (reg1), 
0, 1, \
                                                                          
ARM_CC_GT_UN); \
!                               arm_alu_reg_imm8_cond((inst), ARM_MOV, (reg1), 
0, 0, \
                                                                          
ARM_CC_LE_UN); \
!                               arm_alu_reg_cond((inst), ARM_MVN, (reg1), 
(reg1), \
                                                                 ARM_CC_LT_UN); 
\
                        } while (0)