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[Dotgnu-pnet-commits] CVS: pnet/engine md_arm.h, 1.9, 1.10 md_ia64.h, 1
From: |
Rhys Weatherley <address@hidden> |
Subject: |
[Dotgnu-pnet-commits] CVS: pnet/engine md_arm.h, 1.9, 1.10 md_ia64.h, 1.1, 1.2 md_ppc.h, 1.1, 1.2 md_x86.h, 1.7, 1.8 unroll_branch.c, 1.2, 1.3 |
Date: |
Sun, 10 Aug 2003 02:20:12 -0400 |
Update of /cvsroot/dotgnu-pnet/pnet/engine
In directory subversions:/tmp/cvs-serv5274/engine
Modified Files:
md_arm.h md_ia64.h md_ppc.h md_x86.h unroll_branch.c
Log Message:
Add a "cond" parameter to the "md_cmp" macros to indicate
the kind of condition that is being checked for; needed for
PPC and ia64 where the condition codes are set in different
ways for different tests.
Index: md_arm.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/md_arm.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -C2 -r1.9 -r1.10
*** md_arm.h 13 Jul 2003 01:34:12 -0000 1.9
--- md_arm.h 10 Aug 2003 06:20:09 -0000 1.10
***************
*** 552,563 ****
/*
* Set the condition codes based on comparing two values.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,reg1,reg2) \
arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_32(inst,reg1,reg2) \
! arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,reg1,reg2) \
! arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_native(inst,reg1,reg2) \
arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
--- 552,561 ----
/*
* Set the condition codes based on comparing two values.
+ * The "cond" value indicates the type of condition that we
+ * want to check for.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,cond,reg1,reg2) \
arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,cond,reg1,reg2) \
arm_test_reg_reg((inst), ARM_CMP, (reg1), (reg2))
***************
*** 580,584 ****
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,reg,imm) \
arm_test_reg_imm((inst), ARM_CMP, (reg), (int)(imm))
--- 578,582 ----
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,cond,reg,imm) \
arm_test_reg_imm((inst), ARM_CMP, (reg), (int)(imm))
Index: md_ia64.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/md_ia64.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -r1.1 -r1.2
*** md_ia64.h 10 Aug 2003 02:11:58 -0000 1.1
--- md_ia64.h 10 Aug 2003 06:20:09 -0000 1.2
***************
*** 1111,1123 ****
/*
* Set the condition codes based on comparing two values.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,reg1,reg2) \
dmesg("md_cmp_cc_reg_reg_word_32")
! #define md_ucmp_cc_reg_reg_word_32(inst,reg1,reg2) \
! dmesg("md_ucmp_cc_reg_reg_word_32")
! #define md_cmp_cc_reg_reg_word_native(inst,reg1,reg2) \
dmesg("md_cmp_cc_reg_reg_word_native")
- #define md_ucmp_cc_reg_reg_word_native(inst,reg1,reg2) \
- dmesg("md_ucmp_cc_reg_reg_word_native")
/*
--- 1111,1121 ----
/*
* Set the condition codes based on comparing two values.
+ * The "cond" value indicates the type of condition that we
+ * want to check for.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,cond,reg1,reg2) \
dmesg("md_cmp_cc_reg_reg_word_32")
! #define md_cmp_cc_reg_reg_word_native(inst,cond,reg1,reg2) \
dmesg("md_cmp_cc_reg_reg_word_native")
/*
***************
*** 1139,1143 ****
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,reg,imm) \
dmesg("md_cmp_reg_imm_word_32")
--- 1137,1141 ----
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,cond,reg,imm) \
dmesg("md_cmp_reg_imm_word_32")
Index: md_ppc.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/md_ppc.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -r1.1 -r1.2
*** md_ppc.h 5 Aug 2003 02:25:46 -0000 1.1
--- md_ppc.h 10 Aug 2003 06:20:09 -0000 1.2
***************
*** 552,564 ****
/*
* Set the condition codes based on comparing two values.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,reg1,reg2) \
! ppc_cmp_reg_reg((inst), PPC_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_32(inst,reg1,reg2) \
! ppc_cmp_reg_reg((inst), PPC_CMPL, (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,reg1,reg2) \
! ppc_cmp_reg_reg((inst), PPC_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_native(inst,reg1,reg2) \
! ppc_cmp_reg_reg((inst), PPC_CMPL, (reg1), (reg2))
/*
--- 552,564 ----
/*
* Set the condition codes based on comparing two values.
+ * The "cond" value indicates the type of condition that we
+ * want to check for.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,cond,reg1,reg2) \
! ppc_cmp_reg_reg((inst), ((cond) & 16) ? PPC_CMPL :
PPC_CMP, \
! (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,cond,reg1,reg2) \
! ppc_cmp_reg_reg((inst), ((cond) & 16) ? PPC_CMPL :
PPC_CMP, \
! (reg1), (reg2))
/*
***************
*** 580,585 ****
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,reg,imm) \
! ppc_cmp_reg_imm((inst), PPC_CMPL, (reg), (int)(imm))
/*
--- 580,586 ----
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,cond,reg,imm) \
! ppc_cmp_reg_imm((inst), ((cond) & 16) ? PPC_CMPL :
PPC_CMP, \
! (reg), (int)(imm))
/*
***************
*** 608,612 ****
ppc_branch_imm((inst), PPC_CC_GE, 0)
#define md_branch_cc(inst,cond) \
! ppc_branch_imm((inst), (cond), 0)
/*
--- 609,613 ----
ppc_branch_imm((inst), PPC_CC_GE, 0)
#define md_branch_cc(inst,cond) \
! ppc_branch_imm((inst), (cond) & ~16, 0)
/*
***************
*** 622,629 ****
#define MD_CC_GT PPC_CC_GT
#define MD_CC_GE PPC_CC_GE
! #define MD_CC_LT_UN PPC_CC_LT
! #define MD_CC_LE_UN PPC_CC_LE
! #define MD_CC_GT_UN PPC_CC_GT
! #define MD_CC_GE_UN PPC_CC_GE
/*
--- 623,630 ----
#define MD_CC_GT PPC_CC_GT
#define MD_CC_GE PPC_CC_GE
! #define MD_CC_LT_UN (PPC_CC_LT | 16)
! #define MD_CC_LE_UN (PPC_CC_LE | 16)
! #define MD_CC_GT_UN (PPC_CC_GT | 16)
! #define MD_CC_GE_UN (PPC_CC_GE | 16)
/*
Index: md_x86.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/md_x86.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -C2 -r1.7 -r1.8
*** md_x86.h 13 Jul 2003 01:34:12 -0000 1.7
--- md_x86.h 10 Aug 2003 06:20:09 -0000 1.8
***************
*** 571,582 ****
/*
* Set the condition codes based on comparing two values.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,reg1,reg2) \
x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_32(inst,reg1,reg2) \
! x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,reg1,reg2) \
! x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
! #define md_ucmp_cc_reg_reg_word_native(inst,reg1,reg2) \
x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
--- 571,580 ----
/*
* Set the condition codes based on comparing two values.
+ * The "cond" value indicates the type of condition that we
+ * want to check for.
*/
! #define md_cmp_cc_reg_reg_word_32(inst,cond,reg1,reg2) \
x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
! #define md_cmp_cc_reg_reg_word_native(inst,cond,reg1,reg2) \
x86_alu_reg_reg((inst), X86_CMP, (reg1), (reg2))
***************
*** 599,603 ****
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,reg,imm) \
x86_alu_reg_imm((inst), X86_CMP, (reg), (int)(imm))
--- 597,601 ----
* the condition codes based on the result.
*/
! #define md_cmp_reg_imm_word_32(inst,cond,reg,imm) \
x86_alu_reg_imm((inst), X86_CMP, (reg), (int)(imm))
Index: unroll_branch.c
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/unroll_branch.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -r1.2 -r1.3
*** unroll_branch.c 13 Jul 2003 01:34:12 -0000 1.2
--- unroll_branch.c 10 Aug 2003 06:20:09 -0000 1.3
***************
*** 73,77 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 73,77 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_NE, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 89,93 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_NATIVE |
MD_REG2_NATIVE);
! md_cmp_cc_reg_reg_word_native(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 89,93 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_NATIVE |
MD_REG2_NATIVE);
! md_cmp_cc_reg_reg_word_native(unroll.out, MD_CC_NE, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 105,109 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 105,109 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_EQ, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 121,125 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_NATIVE |
MD_REG2_NATIVE);
! md_cmp_cc_reg_reg_word_native(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 121,125 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_NATIVE |
MD_REG2_NATIVE);
! md_cmp_cc_reg_reg_word_native(unroll.out, MD_CC_EQ, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 137,141 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 137,141 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_GE, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 153,157 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_ucmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 153,157 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_GE_UN, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 169,173 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 169,173 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_GT, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 185,189 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_ucmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 185,189 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_GT_UN, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 201,205 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 201,205 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_LE, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 217,221 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_ucmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 217,221 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_LE_UN, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 233,237 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 233,237 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_LT, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 249,253 ****
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_ucmp_cc_reg_reg_word_32(unroll.out, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
--- 249,253 ----
GetTopTwoWordRegisters(&unroll, ®, ®2,
MD_REG1_32BIT |
MD_REG2_32BIT);
! md_cmp_cc_reg_reg_word_32(unroll.out, MD_CC_LT_UN, reg, reg2);
FreeTopRegister(&unroll, -1);
FreeTopRegister(&unroll, -1);
***************
*** 330,334 ****
reg = MD_REG_0;
}
! md_cmp_reg_imm_word_32(unroll.out, reg, CVM_ARG_SWITCH_LIMIT);
patch = unroll.out;
md_branch_ge_un(unroll.out);
--- 330,334 ----
reg = MD_REG_0;
}
! md_cmp_reg_imm_word_32(unroll.out, MD_CC_GE_UN, reg,
CVM_ARG_SWITCH_LIMIT);
patch = unroll.out;
md_branch_ge_un(unroll.out);
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Rhys Weatherley <address@hidden> <=