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[dotgnu-pnet-commits] pnet ChangeLog engine/verify_branch.c
From: |
Klaus Treichel |
Subject: |
[dotgnu-pnet-commits] pnet ChangeLog engine/verify_branch.c |
Date: |
Mon, 14 Jul 2008 18:32:19 +0000 |
CVSROOT: /cvsroot/dotgnu-pnet
Module name: pnet
Changes by: Klaus Treichel <ktreichel> 08/07/14 18:32:19
Modified files:
. : ChangeLog
engine : verify_branch.c
Log message:
Add the logical not optimization for ceq and look for "ldc.i4.0;ceq" too
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/pnet/ChangeLog?cvsroot=dotgnu-pnet&r1=1.3542&r2=1.3543
http://cvs.savannah.gnu.org/viewcvs/pnet/engine/verify_branch.c?cvsroot=dotgnu-pnet&r1=1.17&r2=1.18
Patches:
Index: ChangeLog
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/ChangeLog,v
retrieving revision 1.3542
retrieving revision 1.3543
diff -u -b -r1.3542 -r1.3543
--- ChangeLog 12 Jul 2008 11:38:33 -0000 1.3542
+++ ChangeLog 14 Jul 2008 18:32:19 -0000 1.3543
@@ -1,3 +1,11 @@
+2008-07-14 Klaus Treichel <address@hidden>
+
+ * engine/verify_branch.c (IL_PREFIX_OP_CEQ): Look for a following
+ "ldc.i4.1;xor" and "ldc.i4.0;ceq" which are sequences for a logical not,
+ pass the inverttest to the coder and skip the not sequence.
+ * engine/verify_branch.c (IL_PREFIX_OP_Cxx): Add the check for
+ "ldc.i4.0;ceq" too.
+
2008-07-12 Klaus Treichel <address@hidden>
* codegen/cg_logical.tc (ILNode_GenValue(ILNode_LogicalNot)): Change the
Index: engine/verify_branch.c
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/verify_branch.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -b -r1.17 -r1.18
--- engine/verify_branch.c 7 Oct 2007 19:20:12 -0000 1.17
+++ engine/verify_branch.c 14 Jul 2008 18:32:19 -0000 1.18
@@ -662,7 +662,35 @@
}
if(commonType != ILEngineType_Invalid)
{
+ /*
+ * Note: Look for logical not and give the coder the
+ * opportunity to optimize it away by inverting the test.
+ * First look for "ldc.i4.1;xor" because this is what's
+ * generated by cscc.
+ */
+ if(pc[2] == IL_OP_LDC_I4_1 && pc[3] == IL_OP_XOR &&
+ !IsJumpTarget(jumpMask, offset + 2) &&
+ !IsJumpTarget(jumpMask, offset + 3))
+ {
+ ILCoderCompare(coder, opcode, STK_BINARY_1,
STK_BINARY_2, 1);
+ insnSize = 4;
+ }
+ /*
+ * Then look for "ldc.i4.0;ceq" because other compilers tend
+ * to generate this sequence for a logical not.
+ */
+ else if(pc[2] == IL_OP_LDC_I4_0 && pc[3] == IL_OP_PREFIX &&
+ pc[4] == IL_PREFIX_OP_CEQ &&
+ !IsJumpTarget(jumpMask, offset + 2) &&
+ !IsJumpTarget(jumpMask, offset + 3))
+ {
+ ILCoderCompare(coder, opcode, STK_BINARY_1,
STK_BINARY_2, 1);
+ insnSize = 5;
+ }
+ else
+ {
ILCoderCompare(coder, opcode, STK_BINARY_1, STK_BINARY_2, 0);
+ }
STK_BINARY_1 = ILEngineType_I4;
STK_TYPEINFO_1 = 0;
--stackSize;
@@ -713,6 +741,18 @@
ILCoderCompare(coder, opcode, STK_BINARY_1,
STK_BINARY_2, 1);
insnSize = 4;
}
+ /*
+ * Then look for "ldc.i4.0;ceq" because other compilers tend
+ * to generate this sequence for a logical not.
+ */
+ else if(pc[2] == IL_OP_LDC_I4_0 && pc[3] == IL_OP_PREFIX &&
+ pc[4] == IL_PREFIX_OP_CEQ &&
+ !IsJumpTarget(jumpMask, offset + 2) &&
+ !IsJumpTarget(jumpMask, offset + 3))
+ {
+ ILCoderCompare(coder, opcode, STK_BINARY_1,
STK_BINARY_2, 1);
+ insnSize = 5;
+ }
else
{
ILCoderCompare(coder, opcode, STK_BINARY_1,
STK_BINARY_2, 0);
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