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[Guile-commits] 191/437: Add updated sparc example from lightning 1.2c d


From: Andy Wingo
Subject: [Guile-commits] 191/437: Add updated sparc example from lightning 1.2c documentation.
Date: Mon, 2 Jul 2018 05:14:15 -0400 (EDT)

wingo pushed a commit to branch lightning
in repository guile.

commit 678e72484c859c3f740c7723da55a8fc90654f99
Author: pcpa <address@hidden>
Date:   Tue Feb 19 22:10:35 2013 -0300

    Add updated sparc example from lightning 1.2c documentation.
    
        * doc/body.texi: Add back the SPARC code generation example.
---
 ChangeLog     |  4 ++++
 doc/body.texi | 19 ++++++++++++++++++-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 56ecbd0..0d6007f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
 2013-02-19 Paulo Andrade <address@hidden>
 
+       * doc/body.texi: Add back the SPARC code generation example.
+
+2013-02-19 Paulo Andrade <address@hidden>
+
        * check/lightning.c: Remove state flag to work with partial
        sparc port, by just disassembling if there was incomplete
        code generation.
diff --git a/doc/body.texi b/doc/body.texi
index 3eef13b..7d3099d 100644
--- a/doc/body.texi
+++ b/doc/body.texi
@@ -710,11 +710,28 @@ code for these instructions.  The client program has the 
responsibility
 of describing the code to be generated using the standard @lightning{}
 instruction set.
 
-Let's examine the code generated for @code{incr} on the x86_64
+Let's examine the code generated for @code{incr} on the SPARC and x86_64
 architecture (on the right is the code that an assembly-language
 programmer would write):
 
 @table @b
address@hidden SPARC
address@hidden
+      save  %sp, -112, %sp
+      mov  %i0, %g2                 ret
+      inc  %g2                      inc %i0
+      mov  %g2, %i0
+      restore 
+      retl 
+      nop 
address@hidden example
+In this case, @lightning{} introduces overhead to create a register
+window (not knowing that the procedure is a leaf procedure) and to
+move the argument to the general purpose register @code{R0} (which
+maps to @code{%g2} on the SPARC).
address@hidden table
+
address@hidden @b
 @item x86_64
 @example
     sub   $0x30,%rsp



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