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Re: RISC-V port for GSoC?
From: |
ng0 |
Subject: |
Re: RISC-V port for GSoC? |
Date: |
Thu, 08 Feb 2018 19:34:42 +0000 |
On Thu, 08 Feb 2018, Ricardo Wurmus <address@hidden> wrote:
> Ludovic Courtès <address@hidden> writes:
>
>> To give some context, the issue is about the RISC-V port item at
>> <https://libreplanet.org/wiki/Group:Guix/GSoC-2018>.
>>
>> I’m happy to help with Guix porting insight, but apart from that I’m not
>> the most qualified person and I’d rather have someone else mentor it, if
>> someone were to take this project. Any takers?
>>
>> Actually I’m unsure how good of a project it is for GSoC. GSoC is about
>> development, but this one is not so much development, as Ricardo wrote
>> in the context of Outreachy.
>
> It’s difficult to mentor a project like that; a consequence is that it
> doesn’t really fit into the framework of GSoC, where mentors need to
> have some way of deciding if the student is still on track (and fail the
> student if necessary).
>
> For a project that is “follow the instructions” in the best case and
> “wait for upstream to fix it” in the worst case, I really don’t feel
> comfortable having this as a GSoC project. Problems encountered in the
> porting effort are unforeseeable and could be outside the student’s
> means to work around them — what do we do then? Fail the student? Pass
> them by default? It doesn’t really make sense to me to have a project
> that has big unknowns as dependencies.
>
> My opinion is to remove it from the list of GSoC ideas.
Okay, sounds more than reasonable. I also vote for removal.
So we have 4 people agreeing on removal.. let's take it down then.
>> (RISC-V porting in itself does sound useful to me, just somewhat
>> unsuitable for GSoC.)
>
> Same here.
>
> --
> Ricardo
>
> GPG: BCA6 89B6 3655 3801 C3C6 2150 197A 5888 235F ACAC
> https://elephly.net
Thanks for all your replies, Ludovic, Ricardo and Gàbor.
--
ng0 :: https://crash.cx
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ARM compilation via qemu binfmt - Assertion failure, Danny Milosavljevic, 2018/02/08