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Re: [guss-hackers] machine description format
From: |
Johan Rydberg |
Subject: |
Re: [guss-hackers] machine description format |
Date: |
Mon, 2 Jun 2003 19:48:48 +0200 |
On Mon, 2 Jun 2003 18:09:52 +0200
Johan Rydberg <address@hidden> wrote:
: (define_insn "add+el+gl"
: (+ (f-opcode 0x01))
: "DATASIZE32"
: (set (match_operand:SI 0 "general_modrm")
: (plus:SI (match_dup:SI 0)
: (match_operand:SI 1 "general_register")))
: )
Another idea is that force the match_operand RTX to have a third
argument, specifying several possible versions of the operand.
Each version of a operand can have its own simulator semantic
implementation. This will increase the performance of the
interpreter.
(set (match_operand:SI 0 "general_modrm" "m,r")
(plus:SI (match_dup:SI 0)
(match_operand:SI 1 "general_register" "r")))
The example above can result in two semantic implementations.
One (the first) that where the first operand can be a memory
address, and one where the operand is a simple register.
Which version of the semantic implementation that should be
used it determined when the insn in decoded and general_modrm
sees what type of mod/rm byte is located in the insn stream.
The third argument specifies what type of operand that is
allowed for the insn, not which operands that is supported by
general_modrm.
brgds,
Johan Rydberg