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warning: overriding commands for target
From: |
James |
Subject: |
warning: overriding commands for target |
Date: |
11 Apr 2006 11:57:03 -0700 |
User-agent: |
G2/0.2 |
Let's say
cat Makefile
include A.mk
include B.mk
A.mk and B.mk define the same target since, depending on the global
variables,
Makefile may include one or both .mk files.
Is there a way to do it without the warning message,
warning: overriding commands for target ... ?
I am looking for a method such as
if defined already, skip the following section
Thanks.
James
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