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[Help-gnucap] gnucap with verilog-ams netlist input
From: |
John Griessen |
Subject: |
[Help-gnucap] gnucap with verilog-ams netlist input |
Date: |
Sun, 25 Jan 2009 11:11:09 -0600 |
User-agent: |
Mozilla-Thunderbird 2.0.0.17 (X11/20081018) |
Hi,
How do I connect a gnucap internal capacitor model to this netlist generated by
gnetlist -g verilog?
/* structural Verilog generated by gnetlist */
/* WARNING: This is a generated file, edits */
/* made here will be lost next time */
/* you run gnetlist! */
/* Id ..........$Id$ */
/* Source.......$Source$ */
/* Revision.....$Revision$ */
/* Author.......$Author$ */
module verilog_io ( GND , C , A );
/* Port directions begin here */
inout GND ;
inout C ;
inout A ;
/* Wires from the design */
//electrical B ;
//electrical GND ;
//electrical C ;
//electrical A ;
/* continuous assignments */
/* Package instantiations */
cap #(.value(1250e-9) ) C1 ( .p(B), .n(GND));
ind #(.l(.001) ) L1 ( .n(C), .p(B));
res #(.r(1000) ) R1 ( .n(B), .p(A));
endmodule
Thanks,
John Griessen
--
Ecosensory Austin TX
- [Help-gnucap] gnucap with verilog-ams netlist input,
John Griessen <=