Re: [Help-gnucap] Verilog-A(MS) & gnucap

[gserdyuk]

Hello Andrey,

plese - take a look at
http://git.gnucapplus.org/gitweb/

1) gnucap-mot-adms.git
http://git.gnucapplus.org/gitweb/?p=gnucap-mot-adms.git;a=summary

This is port of NGSpice mot-adms (made by Laurent Lemaitre) to gnucap

gnucap can use (-a switch,  .attach .load commands) plugins, including
models and can understand Spice, BSIM and NGspice models. This tool
uses NGspice interface and allows to compile Verilog-A models into C
code, which then shall be compiled into *.so and then attached and
used in gnucap.

2) gnucap-icarus.git
http://git.gnucapplus.org/gitweb/?p=gnucap-icarus.git;a=summary
This plugin allows co-simulation of icarus and gnucap
more details inside :)

Regards
Gena


Tuesday, October 26, 2010, 1:02:52 PM, you wrote:

AF> Hallo,

AF> I am interested in using Verilog-A files with gnucap. If this is
AF> still not possible I would like to make something
AF> (proof-of-concept at first, probably with Icarus Verilog as compiler).

AF> On gnucap-wiki-homepage site is written "You can also use the
AF> "ADMS" model compiler, to generate a Spice model, ...", but I
AF> haven't found either any working example nor any *.c-file on the 
ADMS-homepage.

AF> Also on the same wiki-page is written "There is work in progress
AF> to use Icarus Verilog as the [Verilog?] model compiler."

AF> Does somebody know if one of these two projects is really working
AF> and if "Icarus Verilog Code Generator"-like-project would be still useful?


AF> Thanks in advance,
AF> Andreas



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-- 
Best regards,
 Gserdyuk                            mailto:address@hidden