Re: Target Specific Variable questions

[Paul D. Smith]

%% "John Jamulla" <address@hidden> writes:

  jj> I just recently decided to try using target specific variables and I
  jj> have a couple of questions:

  jj> Here's an excerpt (most of)of my makefile before questions:
  jj> --------------------  cut here ----------------------------
  jj> LIBNAME  := timer_check.a
  jj> OBJS     := clkcntr.o
  jj> CCFLAGS  := -g -O0 -n32 -mips4 -ansi
  jj> SYSLIBS  :=  -lc

  jj> EXEC := timer_check

  jj> all: $(OBJS) $(LIBNAME) $(EXEC)

  jj> opt : override CCFLAGS := -O3 -n32 -mips4 -ansi
  jj> opt : override EXEC := opt_timer_check
  jj> opt : all

  jj> n64 : override CCFLAGS := -O3 -64 -mips4 -ansi
  jj> n64 : override EXEC := opt64_timer_check
  jj> n64 : all

You probably don't want these "override" values here; they cause values
on the command line to be overridden by what's in the makefile.
Generally not a good idea except in very unusual circumstances.

  jj> clkcntr.c : clkcntr.h

  jj> clkcntr.o : clkcntr.c
  jj>         cc $(CCFLAGS) $(DEFINES) $(INCLUDES) -c $< -o $@

  jj> timer_check.o : timer_check.cpp
  jj>         CC $(CCFLAGS) $(DEFINES) $(INCLUDES) -c $< -o $@

  jj> $(LIBNAME) : $(OBJS)
  jj>         ar -crv $@ $?


  jj> $(EXEC): timer_check.o  $(LIBNAME)
  jj>         @echo "inside rule for exec = $(EXEC)"
  jj>         CC $(CCFLAGS) $(DEFINES) $(INCLUDES) $< -o $(EXEC) \
  jj>             -L. $(LIBNAME) $(SYSLIBS)

  jj> 1) In the $(EXEC) target, in the CC command, I could NOT use the
  jj> variable $@ correctly as I expected. I wanted the name of the
  jj> target to be 'opt64_timer_check' when trying to execute "make
  jj> n64". I used an echo inside the rule (as the first command), and
  jj> the $(EXEC) variable was set to 'opt64_timer_check', but the $@
  jj> was still set to 'timer_check'. Is this a bug or a feature? Sounds
  jj> like a bug to me.

I don't see any reference to $@ in the EXEC target?

Anyway, the behavior you're seeing is correct.  The value of $@ will
always be set to the name of the target and is not affected by the value
of target-specific variables.

Further, target-specific variables _only_ affect the values of variables
_within the command script_; they are inoperative for variables
appearing in the target or prerequisite parts of the rule.

To understand this, realize that make parses makefiles in two distinct
passes: in the first pass it reads the makefile and constructs an
internal directed acyclic graph representing all the targets and their
prerequisites.  At this time it evaluates all variables appearing in the
target or prerequisite areas, otherwise it cannot construct the graph.

In the second pass it walks the DAG from the starting point(s) you
specify on the command line (or else the first target mentioned in the
makefile, just to pick one) and attempts to make it up to date; to do
this it might need to run commands.

One of the most important sections in the GNU make manual for anyone
interested in writing makefiles of even moderate complexity is "How
'make' Reads A Makefile".

  jj> 2) I tried to use the above makefile, and had a couple rules as follows:
  jj> %.o : %.c
  jj>         cc $(CCFLAGS) $(DEFINES) $(INCLUDES) -c $< -o $@

  jj> %.o : %.cpp
  jj>         cc $(CCFLAGS) $(DEFINES) $(INCLUDES) -c $< -o $@

  jj> Question: I think the above two rules are static pattern rules, s this
  jj> true?

No.  These are normal pattern rules.  Static pattern rules have three
components with two semicolons.  Like:

  foo.o bar.o baz.o: %.o : %.c
        ....

  jj> Using the above two targets and the rest of the above makefile,
  jj> instead of specific rules for the .c and .cpp files, the target
  jj> specific CCFLAGS did NOT get used.  Is this a bug or a feature?

Well, it works exactly as expected for me, so I'd say neither?

With your makefile, if I ran "make", I got the "global" value of
CCFLAGS.  If I ran "make opt" I got the opt value, etc.

If it's not working for you you'll need to come up with a test case and
provide the command you ran, the output you got, etc.

  jj> 3) I can't figure out how to set multiple variables on a single line
  jj> target, something like:

  jj> specialbuild: CCFLAGS += -show  EXEC := specialbuild_forme

  jj> Either I have the wrong syntax, or you can't do this and need
  jj> multiple lines. Can someone let me know?

You can't put multiple target-specific variable settings on one line,
just like you can't put multiple normal variable settings on one line.

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://www.paulandlesley.org/gmake/
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist