Re: executing make in a different directory from a Makefile

[Ravi Parimi]

Paul,

Thanks for your reply. 
 
> First, you should NEVER use "make" when invoking sub-makes.  Always,
> always use the $(MAKE) variable.  If you use plain "make" then none of
> your flags or command line variables will be passed down to the
> sub-make.

I even tried with $(MAKE) but still cannot get make to work. 
>   rp> Is there a way to fix this problem?
 
> If you want EVERYTHING to be exported you can use the "export" command
> by itself with no arguments.  See the GNU make manual.

Maybe I was not clear on what I wanted to do earlier - I do not want
to pass variables in the current Makefile (tests/Makefile) to be
availble to the make process being invoked. My problem is that the sub
make is not able to read some of the variables declared in the
Makefile.
For e.g
/opt/src/main/build/Makefile has a variable called DEFAULT_ARCH := x86
Now I invoke make fomr /opt/src/main/tests/Makefile like this:
build:
        cd ../build;$(MAKE) PRODUCT=server OBJDIR=obj host
I get the following warning saying:
WARNING: ARCH should be set at top-level, defaulting to x86

>From the above, I can only assume that the variables in build/Makefile
are not being read. Can someone show me how to fix this?

Many thanks,
--ravi