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ifdef around define to remove overriding commands for target warning
From: |
Martin d'Anjou |
Subject: |
ifdef around define to remove overriding commands for target warning |
Date: |
Fri, 21 May 2010 13:47:26 -0400 |
User-agent: |
Mozilla/5.0 (X11; U; Linux i686 (x86_64); en-US; rv:1.9.1.9) Gecko/20100317 Thunderbird/3.0.4 |
Hello,
I came up with this makefile to ensure targets were not defined multiple
times when building them on the fly:
all: file1.v file2.v
define rule
ifndef $(basename $(notdir $1))_SENTINEL
$(info Rule not defined. Defining it.)
$(basename $(notdir $1))_SENTINEL:=rule_defined
$1: $2
echo Built $1 $3
else
$(info Sentinel "$(basename $(notdir $1))_SENTINEL" already defined as
$($(basename $(notdir $1))_SENTINEL))
endif
endef
$(info Call 1)
$(eval $(call rule,file1.v,file1.c,1))
$(info Call 2)
$(eval $(call rule,file1.v,file1.c,2))
$(info Call 3)
$(eval $(call rule,file2.v,file2.c,3))
$(info Call 4)
$(eval $(call rule,file2.v,file2.c,4))
$(info done)
However, execution looks strange:
Call 1
Rule not defined. Defining it.
Sentinel "file1_SENTINEL" already defined as
Call 2
Rule not defined. Defining it.
Sentinel "file1_SENTINEL" already defined as rule_define
Call 3
Rule not defined. Defining it.
Sentinel "file2_SENTINEL" already defined as
Call 4
Rule not defined. Defining it.
Sentinel "file2_SENTINEL" already defined as rule_defined
done
echo Built file1.v 1
Built file1.v 1
echo Built file2.v 3
Built file2.v 3
In the end, I get the desired effect (redefinitions of the same rule
don't occur), but both the "then" and the "else" branches be taken at
the same time. Is this a problem?
Regards,
Martin
- ifdef around define to remove overriding commands for target warning,
Martin d'Anjou <=