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Re: Allowing spaces in macro call?
From: |
Peng Yu |
Subject: |
Re: Allowing spaces in macro call? |
Date: |
Wed, 18 Aug 2010 15:45:24 -0500 |
On Wed, Aug 18, 2010 at 3:28 PM, Peng Yu <address@hidden> wrote:
> Hi,
>
> According the manual, it advises not to use spaces or newline in macro
> call like the following. But I feel that it is irritating not to allow
> spaces and newlines, because allowing them could make my Makefile more
> readable.
>
> $(eval $(call some_macro,arg1,arg2))
>
> I found that if I use $$(strip $1) instead of barely $1 in the
> definition of the macro, then the macro call is able to accept spaces
> and newlines. But it is tedious to add $$(strip each time in front of
> the occurrence of $1. I'm wondering if there is any option to
> globally enable the striping of $1, $2,... for all arguments. If it is
> not there in GNU Make, could it be added as an command option, or
> better, added as a derivative (just like derivatives "use warnings;"
> in perl, to change the behavior of a single Makefile). Or there might
> be a better solution to this problem?
One more thing, I had tried to assign $1 to the stripped version of
it, which don't work. People may say to use a variable, but since any
variable is global, it would cause problem when I call test multiple
times.
.PHONY: all
define test
#$1:=$$(strip $1) # don't work here
NAME.$$(strip $1):=$$(strip $1)
all: $$(NAME.$$(strip $1))
.PHONY: $$(NAME.$$(strip $1))
$$(NAME.$$(strip $1)):
@echo $$@
endef
$(eval $(call test, a))
$(eval $(call test, b))
--
Regards,
Peng