Re: Testing the name of a variable passed to a Makefile

[Oleksandr Gavenko]

On 04.04.2011 10:53, José Luis García Pallero wrote:
> Hello,
> Imagine I pass the name of the compiler when I call make:
>
> make build CC=gcc-4.5
>
> Now, imagine that in my Makefile I have defined that depending on the
> compiler I will used different options:
>
> ifeq ($(CC),gcc)
>      CFLAGS=-Wall -Wextra
> endif
> ifeq ($(CC),opencc)
>      CFLAGS=-Wall
> endif
>
> But the problen is that gcc, for example, can be called as gcc,
> gcc-4.5, gcc-3.3, etc. depending on version and the same for opencc or
> another compiler.
> So my question is, how can I detect if some string (gcc, for example)
> is contained in other string (an input argument, for example)?

ifneq '' '$(filter gcc%,$(CC))'
  $(info GCC detected)
endif

--
С уважением, Александр Гавенко.